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psd-data / trunk / librairies / polytech_ge / pont_diode / entity / verilog.v @ 67

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// generated by newgenasym  Fri Sep 24 10:52:03 2010
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module pont_diode (ac, ac1, \v+ , \v- );
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    input ac;
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    input ac1;
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    output \v+ ;
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    output \v- ;
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    initial
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        begin
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        end
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endmodule