Revision 33

View differences:

trunk/librairies/polytech_ge/capacite_pol/metadata/pinlist.txt
1
(Pinlist
2
	(Pin
3
		(Name B)
4
		(MSB )
5
		(LSB )
6
		(Type BIDIR)
7
		(Location Bottom)
8
		(InputLoadLow -0.01)
9
		(InputLoadHigh 0.01)
10
		(OutputLoadLow 1.0)
11
		(OutputLoadHigh -1.0)
12
		(CheckLoad Both)
13
		(CheckIO Both)
14
		(CheckDir 1)
15
		(CheckAssert 1)
16
		(CheckOutput 1)
17
		(UnknownLoading 0)
18
		(PinShape Line)
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
21
	)
22

  
23
	(Pin
24
		(Name A)
25
		(MSB )
26
		(LSB )
27
		(Type BIDIR)
28
		(Location Top)
29
		(InputLoadLow -0.01)
30
		(InputLoadHigh 0.01)
31
		(OutputLoadLow 1.0)
32
		(OutputLoadHigh -1.0)
33
		(CheckLoad Both)
34
		(CheckIO Both)
35
		(CheckDir 1)
36
		(CheckAssert 1)
37
		(CheckOutput 1)
38
		(UnknownLoading 0)
39
		(PinShape Line)
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
42
	)
43

  
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45
)
trunk/librairies/polytech_ge/capacite_pol/metadata/master.tag
1
revision.dat
trunk/librairies/polytech_ge/capacite_pol/metadata/revision.dat
1
(Cell	capacite_pol
2

  
3
	(RevisionInfoBlock	
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		(Baselined	0)
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		(Revision	0.0.1)
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		(ModificationStatus	NULL)
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		(Status	Created)
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		(ErrorStatus	0)
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		(CreateInfo	
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			(Time	09/16/10,10:18:17)
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			(User	profs)
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			(Path	_polytech_ge.capacite_pol)
22

  
23
		)
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		(LastModifyInfo	
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			(Time	09/16/10,10:20:18)
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			(User	profs)
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			(Path	_polytech_ge.capacite_pol)
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		)
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	)
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	(Views	
38

  
39
		(View	Symbol
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			(Symbols	1
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				(Symbol	sym_1
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					(Symbol_Type	Normal)
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					(Max_Size	0)
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					(Checksum	000000000c837a6b)
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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				)
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			)
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			(Checksum	000000001c2103af)
80

  
81
		)
82

  
83
		(View	Chips
84

  
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			(Checksum	000000009c39aaac)
86

  
87
			(Primitives	8
88

  
89
				(Primitive	CAPACITE_POL
90

  
91
					(RevisionInfoBlock	
92

  
93
						(Baselined	0)
94

  
95
						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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109
							(Path	_polytech_ge.capacite_pol)
110

  
111
						)
112

  
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					)
114

  
115
					(LogicalPhysicalPartRelation	
116

  
117
						(LogicalPart	CAPACITE_POL
118

  
119
							(PackType	CAPACITE_POL)
120

  
121
							(PackType	CAPACITE_POL_SMD_POL_40)
122

  
123
						)
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					)
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127
					(Packages	2
128

  
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
136

  
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
148

  
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							(DefaultFootPrint	
150

  
151
								(Name	C_CMS_4)
152

  
153
							)
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155
						)
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					)
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159
				)
160

  
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				(Primitive	CAPACITE_POL_SMD_POL_63
162

  
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL
190

  
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							(PackType	CAPACITE_POL_SMD_POL_63)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	SE6)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_THRU
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
258

  
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						(LogicalPart	CAPACITE_POL
260

  
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							(PackType	CAPACITE_POL_THRU)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	cap_pol_5_08)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_THRU_7_62
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL
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							(PackType	CAPACITE_POL_THRU_7_62)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	cap_pol_7_62)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_THRU_150MM
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL
400

  
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							(PackType	CAPACITE_POL_THRU_150MM)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	cap_150mm)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_1_C_CMS_63
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					(RevisionInfoBlock	
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						(CreateInfo	
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							(Time	09/16/10,10:18:17)
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							(User	profs)
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL_1
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	c_cms_63)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_1_THRU_200
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					(RevisionInfoBlock	
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							(Path	_polytech_ge.capacite_pol)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL_1
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							(PackType	CAPACITE_POL_1_THRU_200)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	thru_200)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_POL_THRU_36MM
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					(RevisionInfoBlock	
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						(Baselined	0)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE_POL
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							(PackType	CAPACITE_POL_THRU_36MM)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	C36MM)
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							)
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						)
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					)
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				)
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			)
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		)
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	)
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	(VersionInfoBlock	
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		(ToolName	PDV)
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		(Version	16.01-s021 (v16-1-53AR))
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trunk/librairies/polytech_ge/capacite_pol/chips/chips.prt
159 159
  end_body;
160 160
end_primitive;
161 161

  
162
primitive 'CAPACITE_POL_THRU_36MM';
163
  pin
164
    'B':
165
      PIN_NUMBER='(2)';
166
      BIDIRECTIONAL='TRUE';
167
      INPUT_LOAD='(-0.01,0.01)';
168
      OUTPUT_LOAD='(1.0,-1.0)';
169
    'A':
170
      PIN_NUMBER='(1)';
171
      BIDIRECTIONAL='TRUE';
172
      INPUT_LOAD='(-0.01,0.01)';
173
      OUTPUT_LOAD='(1.0,-1.0)';
174
  end_pin;
175
  body
176
    PART_NAME='CAPACITE_POL';
177
    BODY_NAME='CAPACITE_POL';
178
    JEDEC_TYPE='C36MM';
179
    PHYS_DES_PREFIX='C';
180
    CLASS='DISCRETE';
181
  end_body;
182
end_primitive;
183

  
162 184
END.
trunk/librairies/polytech_ge/capacite_pol/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct 14, 2009  16:03:58
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 16, 2010  10:20:18
trunk/librairies/polytech_ge/capacite_pol/entity/verilog.v
1
// generated by newgenasym  Wed Oct 14 16:03:58 2009
1
// generated by newgenasym  Thu Sep 16 10:20:18 2010
2 2

  
3 3

  
4 4
module capacite_pol (a, b);
trunk/librairies/polytech_ge/capacite_pol/entity/vhdl.vhd
1
-- generated by newgenasym Wed Oct 14 16:03:58 2009
1
-- generated by newgenasym Thu Sep 16 10:20:18 2010
2 2

  
3 3
library ieee;
4 4
use     ieee.std_logic_1164.all;

Also available in: Unified diff