Revision 31

View differences:

trunk/librairies/polytech_ge/capacite/metadata/revision.dat
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		(Baselined	0)
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		(Revision	0.0.8)
7
		(Revision	0.0.10)
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9 9
		(ModificationStatus	NULL)
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......
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		(LastModifyInfo	
26 26

  
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			(Time	10/14/09,15:56:28)
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			(Time	09/16/10,10:13:28)
28 28

  
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			(User	tchillet)
29
			(User	profs)
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			(Path	ge.capacite)
31
			(Path	_polytech_ge.capacite)
32 32

  
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		)
34 34

  
......
84 84

  
85 85
			(Checksum	000000009756c265)
86 86

  
87
			(Primitives	9
87
			(Primitives	11
88 88

  
89 89
				(Primitive	CAPACITE_THRU_CK05
90 90

  
......
366 366

  
367 367
				)
368 368

  
369
				(Primitive	CAPACITE_THRU_300_(DECOUPLAGE)
370

  
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	)
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							(User	)
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							(Path	)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE
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							(PackType	CAPACITE_THRU_300_(DECOUPLAGE))
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	cap300_ge)
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							)
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						)
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					)
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				)
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				(Primitive	CAPACITE_THRU_400
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					(RevisionInfoBlock	
......
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				)
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				(Primitive	CAPACITE_THRU_300_(DECOUPLAGE)
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				(Primitive	CAPACITE_THRU_26_10
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.3)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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......
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						(CreateInfo	
664 734

  
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							(Time	03/23/09,10:47:05)
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							(Time	09/16/10,10:11:19)
666 736

  
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							(User	laffont)
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							(User	profs)
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							(Path	ge.capacite)
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							(Path	_polytech_ge.capacite)
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						)
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......
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						(LogicalPart	CAPACITE
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							(PackType	CAPACITE_THRU_300_(DECOUPLAGE))
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							(PackType	CAPACITE_THRU_26_10)
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						)
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......
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							(DefaultFootPrint	
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								(Name	cap300_ge)
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								(Name	C26_10)
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							)
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......
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				)
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789
				(Primitive	CAPACITE_THRU_17_7
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/16/10,10:13:01)
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							(User	profs)
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							(Path	_polytech_ge.capacite)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	CAPACITE
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							(PackType	CAPACITE_THRU_17_7)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	C17_7)
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							)
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						)
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					)
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				)
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			)
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		)
trunk/librairies/polytech_ge/capacite/chips/chips.prt
237 237
  end_body;
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end_primitive;
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primitive 'CAPACITE_THRU_26_10';
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  pin
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    'B':
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      PIN_NUMBER='(2)';
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      BIDIRECTIONAL='TRUE';
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      PIN_GROUP='1';
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      INPUT_LOAD='(-0.01,0.01)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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    'A':
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      PIN_NUMBER='(1)';
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      BIDIRECTIONAL='TRUE';
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      PIN_GROUP='1';
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      INPUT_LOAD='(-0.01,0.01)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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  end_pin;
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  body
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    PART_NAME='CAPACITE';
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    ALLOW_CONNECT='TRUE';
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    BODY_NAME='CAPACITE';
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    PINCOUNT='2';
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    SIZE='1';
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    JEDEC_TYPE='C26_10';
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    PHYS_DES_PREFIX='C';
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    CLASS='DISCRETE';
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  end_body;
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end_primitive;
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primitive 'CAPACITE_THRU_17_7';
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  pin
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    'B':
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      PIN_NUMBER='(2)';
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      BIDIRECTIONAL='TRUE';
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      PIN_GROUP='1';
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      INPUT_LOAD='(-0.01,0.01)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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    'A':
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      PIN_NUMBER='(1)';
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      BIDIRECTIONAL='TRUE';
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      PIN_GROUP='1';
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      INPUT_LOAD='(-0.01,0.01)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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  end_pin;
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  body
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    PART_NAME='CAPACITE';
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    ALLOW_CONNECT='TRUE';
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    BODY_NAME='CAPACITE';
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    PINCOUNT='2';
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    SIZE='1';
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    JEDEC_TYPE='C17_7';
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    PHYS_DES_PREFIX='C';
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    CLASS='DISCRETE';
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  end_body;
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end_primitive;
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240 294
END.
trunk/librairies/polytech_ge/capacite/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 10, 2010  11:06:35
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 16, 2010  10:13:28
trunk/librairies/polytech_ge/capacite/entity/verilog.v
1
// generated by newgenasym  Fri Sep 10 11:06:35 2010
1
// generated by newgenasym  Thu Sep 16 10:13:28 2010
2 2

  
3 3

  
4 4
module capacite (a, b);
trunk/librairies/polytech_ge/capacite/entity/vhdl.vhd
1
-- generated by newgenasym Fri Sep 10 11:06:35 2010
1
-- generated by newgenasym Thu Sep 16 10:13:28 2010
2 2

  
3 3
library ieee;
4 4
use     ieee.std_logic_1164.all;

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