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psd-data / trunk / librairies / polytech_ge / 74v1g32 / entity / vhdl.vhd @ 307

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-- generated by newgenasym Fri Oct 07 15:30:00 2011
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library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity \74v1g32\ is
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    port (    
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	\1a\:      IN     STD_LOGIC;    
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	\1b\:      IN     STD_LOGIC;    
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	\1y\:      OUT    STD_LOGIC;    
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	GND:       IN     STD_LOGIC;    
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	VCC:       INOUT  STD_LOGIC);
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end \74v1g32\;