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psd-data / trunk / librairies / polytech_ge_beta / max4172 / entity / vhdl.vhd @ 299

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-- generated by newgenasym Fri Sep 23 17:20:57 2011
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library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity max4172 is
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    port (    
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	GND:       IN     STD_LOGIC;    
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	NC1:       INOUT  STD_LOGIC;    
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	NC2:       INOUT  STD_LOGIC;    
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	\out\:     OUT    STD_LOGIC;    
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	PG:        OUT    STD_LOGIC;    
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	\rs+\:     IN     STD_LOGIC;    
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	\rs-\:     IN     STD_LOGIC;    
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	\v+\:      IN     STD_LOGIC);
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end max4172;