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psd-data / trunk / librairies / polytech_ge / afficheur_lcd_cmg32122 / entity / verilog.v @ 246

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// generated by newgenasym  Tue May 24 16:02:03 2011
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module afficheur_lcd_cmg32122 (a0, cs1, cs2, db0, db1, db2, db3, db4, db5, db6, db7, gnd, res,
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        sla, slk, vdd, vee, wr);
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    inout a0;
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    inout cs1;
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    inout cs2;
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    inout db0;
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    inout db1;
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    inout db2;
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    inout db3;
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    inout db4;
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    inout db5;
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    inout db6;
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    inout db7;
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    input gnd;
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    inout res;
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    inout sla;
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    inout slk;
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    input vdd;
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    inout vee;
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    inout wr;
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    initial
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        begin
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        end
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endmodule