Revision 240

View differences:

trunk/librairies/polytech_ge/tba2822m/cfg_analog/master.tag
1
expand.cfg
trunk/librairies/polytech_ge/tba2822m/cfg_analog/expand.cfg
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config tba2822m;
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design _polytech_ge.tba2822m:sch_1;
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liblist carte_audio_lib, standard, _polytech_ge, _polytech_ge_beta;
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viewlist awb_model, awb_dev, vhdla, vloga, spectrehdl, spice_1, sch_1, entity;
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stoplist awb_model, awb_dev, vhdla, vloga, spectrehdl;
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endconfig
trunk/librairies/polytech_ge/tba2822m/metadata/pinlist.txt
1
(Pinlist
2
	(Pin
3
		(Name OUTPUT1)
4
		(MSB )
5
		(LSB )
6
		(Type OUTPUT)
7
		(Location Left)
8
		(InputLoadLow )
9
		(InputLoadHigh )
10
		(OutputLoadLow 1.0)
11
		(OutputLoadHigh -1.0)
12
		(CheckLoad Both)
13
		(CheckIO Both)
14
		(CheckDir 1)
15
		(CheckAssert 1)
16
		(CheckOutput 1)
17
		(UnknownLoading 0)
18
		(PinShape Line)
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
21
	)
22

  
23
	(Pin
24
		(Name VCC)
25
		(MSB )
26
		(LSB )
27
		(Type POWER)
28
		(Location Left)
29
		(InputLoadLow )
30
		(InputLoadHigh )
31
		(OutputLoadLow )
32
		(OutputLoadHigh )
33
		(CheckLoad Off)
34
		(CheckIO Off)
35
		(CheckDir 0)
36
		(CheckAssert 0)
37
		(CheckOutput 0)
38
		(UnknownLoading 0)
39
		(PinShape Line)
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
42
	)
43

  
44
	(Pin
45
		(Name OPT2)
46
		(MSB )
47
		(LSB )
48
		(Type OUTPUT)
49
		(Location Left)
50
		(InputLoadLow )
51
		(InputLoadHigh )
52
		(OutputLoadLow 1.0)
53
		(OutputLoadHigh -1.0)
54
		(CheckLoad Both)
55
		(CheckIO Both)
56
		(CheckDir 1)
57
		(CheckAssert 1)
58
		(CheckOutput 1)
59
		(UnknownLoading 0)
60
		(PinShape Line)
61
		(DIFF_PAIR_PINS_POS )
62
		(DIFF_PAIR_PINS_NEG )
63
	)
64

  
65
	(Pin
66
		(Name GND)
67
		(MSB )
68
		(LSB )
69
		(Type GROUND)
70
		(Location Left)
71
		(InputLoadLow )
72
		(InputLoadHigh )
73
		(OutputLoadLow )
74
		(OutputLoadHigh )
75
		(CheckLoad Off)
76
		(CheckIO Off)
77
		(CheckDir 0)
78
		(CheckAssert 0)
79
		(CheckOutput 0)
80
		(UnknownLoading 0)
81
		(PinShape Line)
82
		(DIFF_PAIR_PINS_POS )
83
		(DIFF_PAIR_PINS_NEG )
84
	)
85

  
86
	(Pin
87
		(Name IPT-2)
88
		(MSB )
89
		(LSB )
90
		(Type INPUT)
91
		(Location Left)
92
		(InputLoadLow -0.01)
93
		(InputLoadHigh 0.01)
94
		(OutputLoadLow )
95
		(OutputLoadHigh )
96
		(CheckLoad Both)
97
		(CheckIO Both)
98
		(CheckDir 1)
99
		(CheckAssert 1)
100
		(CheckOutput 1)
101
		(UnknownLoading 0)
102
		(PinShape Line)
103
		(DIFF_PAIR_PINS_POS )
104
		(DIFF_PAIR_PINS_NEG )
105
	)
106

  
107
	(Pin
108
		(Name IPT+2)
109
		(MSB )
110
		(LSB )
111
		(Type INPUT)
112
		(Location Left)
113
		(InputLoadLow -0.01)
114
		(InputLoadHigh 0.01)
115
		(OutputLoadLow )
116
		(OutputLoadHigh )
117
		(CheckLoad Both)
118
		(CheckIO Both)
119
		(CheckDir 1)
120
		(CheckAssert 1)
121
		(CheckOutput 1)
122
		(UnknownLoading 0)
123
		(PinShape Line)
124
		(DIFF_PAIR_PINS_POS )
125
		(DIFF_PAIR_PINS_NEG )
126
	)
127

  
128
	(Pin
129
		(Name IPT+1)
130
		(MSB )
131
		(LSB )
132
		(Type INPUT)
133
		(Location Left)
134
		(InputLoadLow -0.01)
135
		(InputLoadHigh 0.01)
136
		(OutputLoadLow )
137
		(OutputLoadHigh )
138
		(CheckLoad Both)
139
		(CheckIO Both)
140
		(CheckDir 1)
141
		(CheckAssert 1)
142
		(CheckOutput 1)
143
		(UnknownLoading 0)
144
		(PinShape Line)
145
		(DIFF_PAIR_PINS_POS )
146
		(DIFF_PAIR_PINS_NEG )
147
	)
148

  
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	(Pin
150
		(Name IPT-1)
151
		(MSB )
152
		(LSB )
153
		(Type INPUT)
154
		(Location Left)
155
		(InputLoadLow -0.01)
156
		(InputLoadHigh 0.01)
157
		(OutputLoadLow )
158
		(OutputLoadHigh )
159
		(CheckLoad Both)
160
		(CheckIO Both)
161
		(CheckDir 1)
162
		(CheckAssert 1)
163
		(CheckOutput 1)
164
		(UnknownLoading 0)
165
		(PinShape Line)
166
		(DIFF_PAIR_PINS_POS )
167
		(DIFF_PAIR_PINS_NEG )
168
	)
169

  
170

  
171
)
trunk/librairies/polytech_ge/tba2822m/metadata/master.tag
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revision.dat
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revision.log
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revhistory.log
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pinlist.txt
trunk/librairies/polytech_ge/tba2822m/metadata/revision.dat
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(Cell	tba2822m
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3
	(RevisionInfoBlock	
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5
		(Baselined	0)
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		(Revision	0.0.2)
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		(ModificationStatus	NULL)
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11
		(Status	Created)
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13
		(ErrorStatus	0)
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		(CreateInfo	
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17
			(Time	11/29/10,09:35:11)
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			(User	ge)
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21
			(Path	_polytech_ge.tba2822m)
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		)
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25
		(LastModifyInfo	
26

  
27
			(Time	11/30/10,10:24:33)
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			(User	ge)
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			(Path	_polytech_ge.tba2822m)
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		)
34

  
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	)
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	(Views	
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39
		(View	Chips
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41
			(Checksum	00000000ef08ed73)
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43
			(Primitives	1
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45
				(Primitive	TBA2822M
46

  
47
					(RevisionInfoBlock	
48

  
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						(Baselined	0)
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						(Revision	0.0.2)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
60

  
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							(Time	11/29/10,09:35:25)
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							(User	ge)
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							(Path	_polytech_ge.tba2822m)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	TBA2822M
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							(PackType	TBA2822M)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	TBA2822M)
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							)
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						)
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					)
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				)
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			)
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		)
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		(View	Symbol
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			(Symbols	1
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				(Symbol	sym_1
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					(Symbol_Type	Normal)
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					(Max_Size	0)
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					(Checksum	000000007f3bc81c)
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.1)
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						(ModificationStatus	NULL)
138

  
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	11/30/10,08:47:42)
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							(User	ge)
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							(Path	_polytech_ge.tba2822m)
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						)
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					)
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				)
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			)
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			(Checksum	000000001c8503ba)
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		)
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		(View	Schematic
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			(Pages	0)
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			(Checksum	000000001be403a8)
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		)
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		(Checksum	000000001cbb03a9)
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	)
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	(VersionInfoBlock	
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		(ToolName	PDV)
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		(Version	16.1-p002 (v16-1-53B))
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		(License	PCB_librarian_expert)
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	)
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	(Checksum	000000001d9703d6)
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)
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trunk/librairies/polytech_ge/tba2822m/chips/master.tag
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chips.prt
trunk/librairies/polytech_ge/tba2822m/chips/chips.prt
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FILE_TYPE=LIBRARY_PARTS;
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primitive 'TBA2822M';
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  pin
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    'OUTPUT1':
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      PIN_NUMBER='(1)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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    'VCC':
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      PIN_NUMBER='(2)';
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      PINUSE='POWER';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    'OPT2':
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      PIN_NUMBER='(3)';
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      OUTPUT_LOAD='(1.0,-1.0)';
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    'GND':
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      PIN_NUMBER='(4)';
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      PINUSE='GROUND';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    'IPT-2':
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      PIN_NUMBER='(5)';
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      INPUT_LOAD='(-0.01,0.01)';
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    'IPT+2':
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      PIN_NUMBER='(6)';
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      INPUT_LOAD='(-0.01,0.01)';
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    'IPT+1':
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      PIN_NUMBER='(7)';
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      INPUT_LOAD='(-0.01,0.01)';
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    'IPT-1':
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      PIN_NUMBER='(8)';
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      INPUT_LOAD='(-0.01,0.01)';
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  end_pin;
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  body
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    PART_NAME='TBA2822M';
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    BODY_NAME='TBA2822M';
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    JEDEC_TYPE='TBA2822M';
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    PHYS_DES_PREFIX='U';
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    CLASS='IC';
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  end_body;
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end_primitive;
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END.
trunk/librairies/polytech_ge/tba2822m/sym_1/master.tag
1
symbol.css
trunk/librairies/polytech_ge/tba2822m/sym_1/symbol.css
1
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L 0 475 250 475 -1 0
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L 250 475 250 75 -1 0
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L 0 75 250 75 -1 0
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T 137 99 0 0 29 0 0 1 0 8 0
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tba2822m
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L -50 400 0 400 -1 0
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C -50 400 "OUTPUT1" -75 400 0 1 29 0 R
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X "PIN_TEXT" "OUTPUT1" 10 400 0 0 23 0 0 0 0 0 1 0 0
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L -50 325 0 325 -1 0
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C -50 325 "VCC" -75 325 0 1 29 0 R
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X "PIN_TEXT" "VCC" 10 325 0 0 23 0 0 0 0 0 1 0 0
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L -50 250 0 250 -1 0
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C -50 250 "OPT2" -75 250 0 1 29 0 R
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X "PIN_TEXT" "OPT2" 25 250 0 0 23 0 0 0 0 0 1 0 0
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L -50 150 0 150 -1 0
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C -50 150 "GND" -75 150 0 1 29 0 R
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X "PIN_TEXT" "GND" 10 150 0 0 23 0 0 0 0 0 1 0 0
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L 300 150 250 150 -1 0
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C 300 150 "IPT-2" 325 149 0 1 29 0 L
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X "PIN_TEXT" "IPT-2" 240 175 0 0 23 0 0 2 0 0 1 0 0
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L 300 250 250 250 -1 0
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C 300 250 "IPT+2" 325 249 0 1 29 0 L
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X "PIN_TEXT" "IPT+2" 240 275 0 0 23 0 0 2 0 0 1 0 0
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L 300 325 250 325 -1 0
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C 300 325 "IPT+1" 325 324 0 1 29 0 L
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X "PIN_TEXT" "IPT+1" 240 350 0 0 23 0 0 2 0 0 1 0 0
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L 300 400 250 400 -1 0
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C 300 400 "IPT-1" 325 399 0 1 29 0 L
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X "PIN_TEXT" "IPT-1" 240 425 0 0 23 0 0 2 0 0 1 0 0
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33

  
trunk/librairies/polytech_ge/tba2822m/psp_sim_1/master.tag
1
tba2822m.net
trunk/librairies/polytech_ge/tba2822m/entity/master.tag
1
vhdl.vhd
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verilog.v
trunk/librairies/polytech_ge/tba2822m/entity/pc.db
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-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Nov 30, 2010  10:24:34
trunk/librairies/polytech_ge/tba2822m/entity/verilog.v
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// generated by newgenasym  Tue Nov 30 10:24:34 2010
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module tba2822m (gnd, \ipt+1 , \ipt+2 , \ipt-1 , \ipt-2 , opt2, output1, vcc);
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    input gnd;
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    input \ipt+1 ;
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    input \ipt+2 ;
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    input \ipt-1 ;
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    input \ipt-2 ;
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    output opt2;
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    output output1;
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    input vcc;
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    initial
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        begin
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        end
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endmodule
trunk/librairies/polytech_ge/tba2822m/entity/vhdl.vhd
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-- generated by newgenasym Tue Nov 30 10:24:34 2010
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library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity tba2822m is
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    port (    
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	GND:       IN     STD_LOGIC;    
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	\ipt+1\:   IN     STD_LOGIC;    
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	\ipt+2\:   IN     STD_LOGIC;    
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	\ipt-1\:   IN     STD_LOGIC;    
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	\ipt-2\:   IN     STD_LOGIC;    
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	OPT2:      OUT    STD_LOGIC;    
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	OUTPUT1:   OUT    STD_LOGIC;    
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	VCC:       IN     STD_LOGIC);
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end tba2822m;
trunk/librairies/polytech_ge/tba2822m/sch_1/module_order.dat
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Version 15.0
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START_MODULEORDER
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@carte_audio_lib.carte_tba(sch_1)	0	0	1	1	0	
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END_MODULEORDER

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