Revision 229

View differences:

trunk/librairies/polytech_ge/he26/metadata/master.tag
1
revision.dat
trunk/librairies/polytech_ge/he26/metadata/revision.dat
1
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		(View	Chips
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				(Primitive	HE26_THRU
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	HE26
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							(PackType	HE26_THRU)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	conn26)
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trunk/librairies/polytech_ge/he26/chips/master.tag
1
chips.prt
trunk/librairies/polytech_ge/he26/chips/chips.prt
1
FILE_TYPE=LIBRARY_PARTS;
2
primitive 'HE26_THRU';
3
  pin
4
    'P1':
5
      PIN_NUMBER='(1)';
6
      PIN_TYPE='ANALOG';
7
      NO_LOAD_CHECK='Both';
8
      NO_IO_CHECK='Both';
9
      NO_ASSERT_CHECK='TRUE';
10
      NO_DIR_CHECK='TRUE';
11
      ALLOW_CONNECT='TRUE';
12
    'P2':
13
      PIN_NUMBER='(2)';
14
      PIN_TYPE='ANALOG';
15
      NO_LOAD_CHECK='Both';
16
      NO_IO_CHECK='Both';
17
      NO_ASSERT_CHECK='TRUE';
18
      NO_DIR_CHECK='TRUE';
19
      ALLOW_CONNECT='TRUE';
20
    'P3':
21
      PIN_NUMBER='(3)';
22
      PIN_TYPE='ANALOG';
23
      NO_LOAD_CHECK='Both';
24
      NO_IO_CHECK='Both';
25
      NO_ASSERT_CHECK='TRUE';
26
      NO_DIR_CHECK='TRUE';
27
      ALLOW_CONNECT='TRUE';
28
    'P4':
29
      PIN_NUMBER='(4)';
30
      PIN_TYPE='ANALOG';
31
      NO_LOAD_CHECK='Both';
32
      NO_IO_CHECK='Both';
33
      NO_ASSERT_CHECK='TRUE';
34
      NO_DIR_CHECK='TRUE';
35
      ALLOW_CONNECT='TRUE';
36
    'P5':
37
      PIN_NUMBER='(5)';
38
      PIN_TYPE='ANALOG';
39
      NO_LOAD_CHECK='Both';
40
      NO_IO_CHECK='Both';
41
      NO_ASSERT_CHECK='TRUE';
42
      NO_DIR_CHECK='TRUE';
43
      ALLOW_CONNECT='TRUE';
44
    'P6':
45
      PIN_NUMBER='(6)';
46
      PIN_TYPE='ANALOG';
47
      NO_LOAD_CHECK='Both';
48
      NO_IO_CHECK='Both';
49
      NO_ASSERT_CHECK='TRUE';
50
      NO_DIR_CHECK='TRUE';
51
      ALLOW_CONNECT='TRUE';
52
    'P7':
53
      PIN_NUMBER='(7)';
54
      PIN_TYPE='ANALOG';
55
      NO_LOAD_CHECK='Both';
56
      NO_IO_CHECK='Both';
57
      NO_ASSERT_CHECK='TRUE';
58
      NO_DIR_CHECK='TRUE';
59
      ALLOW_CONNECT='TRUE';
60
    'P8':
61
      PIN_NUMBER='(8)';
62
      PIN_TYPE='ANALOG';
63
      NO_LOAD_CHECK='Both';
64
      NO_IO_CHECK='Both';
65
      NO_ASSERT_CHECK='TRUE';
66
      NO_DIR_CHECK='TRUE';
67
      ALLOW_CONNECT='TRUE';
68
    'P9':
69
      PIN_NUMBER='(9)';
70
      PIN_TYPE='ANALOG';
71
      NO_LOAD_CHECK='Both';
72
      NO_IO_CHECK='Both';
73
      NO_ASSERT_CHECK='TRUE';
74
      NO_DIR_CHECK='TRUE';
75
      ALLOW_CONNECT='TRUE';
76
    'P10':
77
      PIN_NUMBER='(10)';
78
      PIN_TYPE='ANALOG';
79
      NO_LOAD_CHECK='Both';
80
      NO_IO_CHECK='Both';
81
      NO_ASSERT_CHECK='TRUE';
82
      NO_DIR_CHECK='TRUE';
83
      ALLOW_CONNECT='TRUE';
84
    'P11':
85
      PIN_NUMBER='(11)';
86
      PIN_TYPE='ANALOG';
87
      NO_LOAD_CHECK='Both';
88
      NO_IO_CHECK='Both';
89
      NO_ASSERT_CHECK='TRUE';
90
      NO_DIR_CHECK='TRUE';
91
      ALLOW_CONNECT='TRUE';
92
    'P12':
93
      PIN_NUMBER='(12)';
94
      PIN_TYPE='ANALOG';
95
      NO_LOAD_CHECK='Both';
96
      NO_IO_CHECK='Both';
97
      NO_ASSERT_CHECK='TRUE';
98
      NO_DIR_CHECK='TRUE';
99
      ALLOW_CONNECT='TRUE';
100
    'P13':
101
      PIN_NUMBER='(13)';
102
      PIN_TYPE='ANALOG';
103
      NO_LOAD_CHECK='Both';
104
      NO_IO_CHECK='Both';
105
      NO_ASSERT_CHECK='TRUE';
106
      NO_DIR_CHECK='TRUE';
107
      ALLOW_CONNECT='TRUE';
108
    'P14':
109
      PIN_NUMBER='(14)';
110
      PIN_TYPE='ANALOG';
111
      NO_LOAD_CHECK='Both';
112
      NO_IO_CHECK='Both';
113
      NO_ASSERT_CHECK='TRUE';
114
      NO_DIR_CHECK='TRUE';
115
      ALLOW_CONNECT='TRUE';
116
    'P15':
117
      PIN_NUMBER='(15)';
118
      PIN_TYPE='ANALOG';
119
      NO_LOAD_CHECK='Both';
120
      NO_IO_CHECK='Both';
121
      NO_ASSERT_CHECK='TRUE';
122
      NO_DIR_CHECK='TRUE';
123
      ALLOW_CONNECT='TRUE';
124
    'P16':
125
      PIN_NUMBER='(16)';
126
      PIN_TYPE='ANALOG';
127
      NO_LOAD_CHECK='Both';
128
      NO_IO_CHECK='Both';
129
      NO_ASSERT_CHECK='TRUE';
130
      NO_DIR_CHECK='TRUE';
131
      ALLOW_CONNECT='TRUE';
132
    'P17':
133
      PIN_NUMBER='(17)';
134
      PIN_TYPE='ANALOG';
135
      NO_LOAD_CHECK='Both';
136
      NO_IO_CHECK='Both';
137
      NO_ASSERT_CHECK='TRUE';
138
      NO_DIR_CHECK='TRUE';
139
      ALLOW_CONNECT='TRUE';
140
    'P18':
141
      PIN_NUMBER='(18)';
142
      PIN_TYPE='ANALOG';
143
      NO_LOAD_CHECK='Both';
144
      NO_IO_CHECK='Both';
145
      NO_ASSERT_CHECK='TRUE';
146
      NO_DIR_CHECK='TRUE';
147
      ALLOW_CONNECT='TRUE';
148
    'P19':
149
      PIN_NUMBER='(19)';
150
      PIN_TYPE='ANALOG';
151
      NO_LOAD_CHECK='Both';
152
      NO_IO_CHECK='Both';
153
      NO_ASSERT_CHECK='TRUE';
154
      NO_DIR_CHECK='TRUE';
155
      ALLOW_CONNECT='TRUE';
156
    'P20':
157
      PIN_NUMBER='(20)';
158
      PIN_TYPE='ANALOG';
159
      NO_LOAD_CHECK='Both';
160
      NO_IO_CHECK='Both';
161
      NO_ASSERT_CHECK='TRUE';
162
      NO_DIR_CHECK='TRUE';
163
      ALLOW_CONNECT='TRUE';
164
    'P21':
165
      PIN_NUMBER='(21)';
166
      PIN_TYPE='ANALOG';
167
      NO_LOAD_CHECK='Both';
168
      NO_IO_CHECK='Both';
169
      NO_ASSERT_CHECK='TRUE';
170
      NO_DIR_CHECK='TRUE';
171
      ALLOW_CONNECT='TRUE';
172
    'P22':
173
      PIN_NUMBER='(22)';
174
      PIN_TYPE='ANALOG';
175
      NO_LOAD_CHECK='Both';
176
      NO_IO_CHECK='Both';
177
      NO_ASSERT_CHECK='TRUE';
178
      NO_DIR_CHECK='TRUE';
179
      ALLOW_CONNECT='TRUE';
180
    'P23':
181
      PIN_NUMBER='(23)';
182
      PIN_TYPE='ANALOG';
183
      NO_LOAD_CHECK='Both';
184
      NO_IO_CHECK='Both';
185
      NO_ASSERT_CHECK='TRUE';
186
      NO_DIR_CHECK='TRUE';
187
      ALLOW_CONNECT='TRUE';
188
    'P24':
189
      PIN_NUMBER='(24)';
190
      PIN_TYPE='ANALOG';
191
      NO_LOAD_CHECK='Both';
192
      NO_IO_CHECK='Both';
193
      NO_ASSERT_CHECK='TRUE';
194
      NO_DIR_CHECK='TRUE';
195
      ALLOW_CONNECT='TRUE';
196
    'P25':
197
      PIN_NUMBER='(25)';
198
      PIN_TYPE='ANALOG';
199
      NO_LOAD_CHECK='Both';
200
      NO_IO_CHECK='Both';
201
      NO_ASSERT_CHECK='TRUE';
202
      NO_DIR_CHECK='TRUE';
203
      ALLOW_CONNECT='TRUE';
204
    'P26':
205
      PIN_NUMBER='(26)';
206
      PIN_TYPE='ANALOG';
207
      NO_LOAD_CHECK='Both';
208
      NO_IO_CHECK='Both';
209
      NO_ASSERT_CHECK='TRUE';
210
      NO_DIR_CHECK='TRUE';
211
      ALLOW_CONNECT='TRUE';
212
  end_pin;
213
  body
214
    PART_NAME='HE26';
215
    BODY_NAME='HE26';
216
    JEDEC_TYPE='conn26';
217
    PHYS_DES_PREFIX='U';
218
    CLASS='IC';
219
  end_body;
220
end_primitive;
221

  
222
END.
trunk/librairies/polytech_ge/he26/sym_1/master.tag
1
symbol.css
trunk/librairies/polytech_ge/he26/sym_1/symbol.css
1
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C -200 100 "P12" -225 100 0 1 29 0 R
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X "PIN_TEXT" "P12" -140 100 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 50 "P13" -225 50 0 1 29 0 R
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X "PIN_TEXT" "P13" -140 50 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 0 "P14" -225 0 0 1 29 0 R
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X "PIN_TEXT" "P14" -140 0 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -50 "P15" -225 -50 0 1 29 0 R
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X "PIN_TEXT" "P15" -140 -50 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -150 "P17" -225 -150 0 1 29 0 R
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X "PIN_TEXT" "P17" -140 -150 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -200 "P18" -225 -200 0 1 29 0 R
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X "PIN_TEXT" "P18" -140 -200 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -450 "P23" -225 -450 0 1 29 0 R
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X "PIN_TEXT" "P23" -140 -450 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -600 "P26" -225 -600 0 1 29 0 R
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C -200 -500 "P24" -225 -500 0 1 29 0 R
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C -200 -400 "P22" -225 -400 0 1 29 0 R
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C -200 -350 "P21" -225 -350 0 1 29 0 R
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C -200 -300 "P20" -225 -300 0 1 29 0 R
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C -200 -250 "P19" -225 -250 0 1 29 0 R
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X "PIN_TEXT" "P19" -140 -250 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 -100 "P16" -225 -100 0 1 29 0 R
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X "PIN_TEXT" "P16" -140 -100 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 250 "P9" -225 250 0 1 29 0 R
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X "PIN_TEXT" "P9" -140 250 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 300 "P8" -225 300 0 1 29 0 R
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C -200 400 "P6" -225 400 0 1 29 0 R
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C -200 500 "P4" -225 500 0 1 29 0 R
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C -200 550 "P3" -225 550 0 1 29 0 R
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C -200 600 "P2" -225 600 0 1 29 0 R
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X "PIN_TEXT" "P2" -140 600 0.00 0.00 23 0 0 0 0 0 1 0 0
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C -200 650 "P1" -225 650 0 1 29 0 R
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C -200 150 "P11" -225 150 0 1 29 0 R
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L -150 700 125 700 -1 0
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L -200 650 -150 650 -1 0
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L -200 450 -150 450 -1 0
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L -200 400 -150 400 -1 0
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L -200 250 -150 250 -1 0
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L -200 -250 -150 -250 -1 0
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he26
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P "CDS_LMAN_SYM_OUTLINE" "-125,650,125,-650" 0 0 0.00 0.00 22 0 0 0 0 0 0 0 0
trunk/librairies/polytech_ge/he26/entity/master.tag
1
verilog.v
trunk/librairies/polytech_ge/he26/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct 13, 2010  09:32:07
trunk/librairies/polytech_ge/he26/entity/verilog.v
1
// generated by newgenasym  Wed Oct 13 09:36:10 2010
2

  
3

  
4
module he26 (p1, p10, p11, p12, p13, p14, p15, p16, p17, p18, p19, p2, p20,
5
        p21, p22, p23, p24, p25, p26, p3, p4, p5, p6, p7, p8, p9);
6
    inout p1;
7
    inout p10;
8
    inout p11;
9
    inout p12;
10
    inout p13;
11
    inout p14;
12
    inout p15;
13
    inout p16;
14
    inout p17;
15
    inout p18;
16
    inout p19;
17
    inout p2;
18
    inout p20;
19
    inout p21;
20
    inout p22;
21
    inout p23;
22
    inout p24;
23
    inout p25;
24
    inout p26;
25
    inout p3;
26
    inout p4;
27
    inout p5;
28
    inout p6;
29
    inout p7;
30
    inout p8;
31
    inout p9;
32

  
33

  
34
    initial
35
        begin
36
        end
37

  
38
endmodule
trunk/librairies/polytech_ge/he26/entity/vhdl.vhd
1
-- generated by newgenasym Wed Oct 13 09:36:10 2010
2

  
3
library ieee;
4
use     ieee.std_logic_1164.all;
5
use     work.all;
6
entity HE26 is
7
    port (    
8
	P1:        INOUT  STD_LOGIC;    
9
	P10:       INOUT  STD_LOGIC;    
10
	P11:       INOUT  STD_LOGIC;    
11
	P12:       INOUT  STD_LOGIC;    
12
	P13:       INOUT  STD_LOGIC;    
13
	P14:       INOUT  STD_LOGIC;    
14
	P15:       INOUT  STD_LOGIC;    
15
	P16:       INOUT  STD_LOGIC;    
16
	P17:       INOUT  STD_LOGIC;    
17
	P18:       INOUT  STD_LOGIC;    
18
	P19:       INOUT  STD_LOGIC;    
19
	P2:        INOUT  STD_LOGIC;    
20
	P20:       INOUT  STD_LOGIC;    
21
	P21:       INOUT  STD_LOGIC;    
22
	P22:       INOUT  STD_LOGIC;    
23
	P23:       INOUT  STD_LOGIC;    
24
	P24:       INOUT  STD_LOGIC;    
25
	P25:       INOUT  STD_LOGIC;    
26
	P26:       INOUT  STD_LOGIC;    
27
	P3:        INOUT  STD_LOGIC;    
28
	P4:        INOUT  STD_LOGIC;    
29
	P5:        INOUT  STD_LOGIC;    
30
	P6:        INOUT  STD_LOGIC;    
31
	P7:        INOUT  STD_LOGIC;    
32
	P8:        INOUT  STD_LOGIC;    
33
	P9:        INOUT  STD_LOGIC);
34
end HE26;

Also available in: Unified diff