Statistics
| Revision:

psd-data / trunk / librairies / polytech_ge_beta / wm8731 / entity / vhdl.vhd @ 217

History | View | Annotate | Download (1.09 KB)

1
-- generated by newgenasym Fri Oct 22 15:52:52 2010
2

    
3
library ieee;
4
use     ieee.std_logic_1164.all;
5
use     work.all;
6
entity WM8731 is
7
    port (    
8
	ADCDAT:    OUT    STD_LOGIC;    
9
	ADCLRC:    IN     STD_LOGIC;    
10
	AGND:      IN     STD_LOGIC;    
11
	AVDD:      IN     STD_LOGIC;    
12
	BCLK:      IN     STD_LOGIC;    
13
	CLKOUT:    OUT    STD_LOGIC;    
14
	CSB:       IN     STD_LOGIC;    
15
	DACDAT:    IN     STD_LOGIC;    
16
	DACLRC:    IN     STD_LOGIC;    
17
	DBVDD:     IN     STD_LOGIC;    
18
	DCVDD:     IN     STD_LOGIC;    
19
	DGND:      IN     STD_LOGIC;    
20
	HPGND:     IN     STD_LOGIC;    
21
	HPVDD:     IN     STD_LOGIC;    
22
	LHPOUT:    OUT    STD_LOGIC;    
23
	LLINEIN:   IN     STD_LOGIC;    
24
	LOUT:      OUT    STD_LOGIC;    
25
	MICBIAS:   OUT    STD_LOGIC;    
26
	MICIN:     IN     STD_LOGIC;    
27
	MODE:      IN     STD_LOGIC;    
28
	RHPOUT:    OUT    STD_LOGIC;    
29
	RLINEIN:   IN     STD_LOGIC;    
30
	ROUT:      OUT    STD_LOGIC;    
31
	SCLK:      IN     STD_LOGIC;    
32
	SDIN:      IN     STD_LOGIC;    
33
	VMID:      OUT    STD_LOGIC;    
34
	\xti/mclk\: IN     STD_LOGIC;    
35
	XTO:       OUT    STD_LOGIC);
36
end WM8731;