Revision 217

View differences:

trunk/librairies/polytech_ge_beta/wm8731/metadata/pinlist.txt
1
(Pinlist
2
	(Pin
3
		(Name DBVDD)
4
		(MSB )
5
		(LSB )
6
		(Type POWER)
7
		(Location Left)
8
		(InputLoadLow )
9
		(InputLoadHigh )
10
		(OutputLoadLow )
11
		(OutputLoadHigh )
12
		(CheckLoad Off)
13
		(CheckIO Off)
14
		(CheckDir 0)
15
		(CheckAssert 0)
16
		(CheckOutput 0)
17
		(UnknownLoading 0)
18
		(PinShape )
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
21
	)
22

  
23
	(Pin
24
		(Name CLKOUT)
25
		(MSB )
26
		(LSB )
27
		(Type OUTPUT)
28
		(Location Left)
29
		(InputLoadLow )
30
		(InputLoadHigh )
31
		(OutputLoadLow 1.0)
32
		(OutputLoadHigh -1.0)
33
		(CheckLoad Both)
34
		(CheckIO Both)
35
		(CheckDir 1)
36
		(CheckAssert 1)
37
		(CheckOutput 1)
38
		(UnknownLoading 0)
39
		(PinShape )
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
42
	)
43

  
44
	(Pin
45
		(Name BCLK)
46
		(MSB )
47
		(LSB )
48
		(Type INPUT)
49
		(Location Left)
50
		(InputLoadLow -0.01)
51
		(InputLoadHigh 0.01)
52
		(OutputLoadLow )
53
		(OutputLoadHigh )
54
		(CheckLoad Both)
55
		(CheckIO Both)
56
		(CheckDir 1)
57
		(CheckAssert 1)
58
		(CheckOutput 1)
59
		(UnknownLoading 0)
60
		(PinShape )
61
		(DIFF_PAIR_PINS_POS )
62
		(DIFF_PAIR_PINS_NEG )
63
	)
64

  
65
	(Pin
66
		(Name DACDAT)
67
		(MSB )
68
		(LSB )
69
		(Type INPUT)
70
		(Location Left)
71
		(InputLoadLow -0.01)
72
		(InputLoadHigh 0.01)
73
		(OutputLoadLow )
74
		(OutputLoadHigh )
75
		(CheckLoad Both)
76
		(CheckIO Both)
77
		(CheckDir 1)
78
		(CheckAssert 1)
79
		(CheckOutput 1)
80
		(UnknownLoading 0)
81
		(PinShape )
82
		(DIFF_PAIR_PINS_POS )
83
		(DIFF_PAIR_PINS_NEG )
84
	)
85

  
86
	(Pin
87
		(Name DACLRC)
88
		(MSB )
89
		(LSB )
90
		(Type INPUT)
91
		(Location Left)
92
		(InputLoadLow -0.01)
93
		(InputLoadHigh 0.01)
94
		(OutputLoadLow )
95
		(OutputLoadHigh )
96
		(CheckLoad Both)
97
		(CheckIO Both)
98
		(CheckDir 1)
99
		(CheckAssert 1)
100
		(CheckOutput 1)
101
		(UnknownLoading 0)
102
		(PinShape )
103
		(DIFF_PAIR_PINS_POS )
104
		(DIFF_PAIR_PINS_NEG )
105
	)
106

  
107
	(Pin
108
		(Name ADCDAT)
109
		(MSB )
110
		(LSB )
111
		(Type OUTPUT)
112
		(Location Left)
113
		(InputLoadLow )
114
		(InputLoadHigh )
115
		(OutputLoadLow 1.0)
116
		(OutputLoadHigh -1.0)
117
		(CheckLoad Both)
118
		(CheckIO Both)
119
		(CheckDir 1)
120
		(CheckAssert 1)
121
		(CheckOutput 1)
122
		(UnknownLoading 0)
123
		(PinShape )
124
		(DIFF_PAIR_PINS_POS )
125
		(DIFF_PAIR_PINS_NEG )
126
	)
127

  
128
	(Pin
129
		(Name ADCLRC)
130
		(MSB )
131
		(LSB )
132
		(Type INPUT)
133
		(Location Left)
134
		(InputLoadLow -0.01)
135
		(InputLoadHigh 0.01)
136
		(OutputLoadLow )
137
		(OutputLoadHigh )
138
		(CheckLoad Both)
139
		(CheckIO Both)
140
		(CheckDir 1)
141
		(CheckAssert 1)
142
		(CheckOutput 1)
143
		(UnknownLoading 0)
144
		(PinShape )
145
		(DIFF_PAIR_PINS_POS )
146
		(DIFF_PAIR_PINS_NEG )
147
	)
148

  
149
	(Pin
150
		(Name HPVDD)
151
		(MSB )
152
		(LSB )
153
		(Type POWER)
154
		(Location Left)
155
		(InputLoadLow )
156
		(InputLoadHigh )
157
		(OutputLoadLow )
158
		(OutputLoadHigh )
159
		(CheckLoad Off)
160
		(CheckIO Off)
161
		(CheckDir 0)
162
		(CheckAssert 0)
163
		(CheckOutput 0)
164
		(UnknownLoading 0)
165
		(PinShape )
166
		(DIFF_PAIR_PINS_POS )
167
		(DIFF_PAIR_PINS_NEG )
168
	)
169

  
170
	(Pin
171
		(Name LHPOUT)
172
		(MSB )
173
		(LSB )
174
		(Type OUTPUT)
175
		(Location Left)
176
		(InputLoadLow )
177
		(InputLoadHigh )
178
		(OutputLoadLow 1.0)
179
		(OutputLoadHigh -1.0)
180
		(CheckLoad Both)
181
		(CheckIO Both)
182
		(CheckDir 1)
183
		(CheckAssert 1)
184
		(CheckOutput 1)
185
		(UnknownLoading 0)
186
		(PinShape )
187
		(DIFF_PAIR_PINS_POS )
188
		(DIFF_PAIR_PINS_NEG )
189
	)
190

  
191
	(Pin
192
		(Name RHPOUT)
193
		(MSB )
194
		(LSB )
195
		(Type OUTPUT)
196
		(Location Left)
197
		(InputLoadLow )
198
		(InputLoadHigh )
199
		(OutputLoadLow 1.0)
200
		(OutputLoadHigh -1.0)
201
		(CheckLoad Both)
202
		(CheckIO Both)
203
		(CheckDir 1)
204
		(CheckAssert 1)
205
		(CheckOutput 1)
206
		(UnknownLoading 0)
207
		(PinShape )
208
		(DIFF_PAIR_PINS_POS )
209
		(DIFF_PAIR_PINS_NEG )
210
	)
211

  
212
	(Pin
213
		(Name HPGND)
214
		(MSB )
215
		(LSB )
216
		(Type GROUND)
217
		(Location Left)
218
		(InputLoadLow )
219
		(InputLoadHigh )
220
		(OutputLoadLow )
221
		(OutputLoadHigh )
222
		(CheckLoad Off)
223
		(CheckIO Off)
224
		(CheckDir 0)
225
		(CheckAssert 0)
226
		(CheckOutput 0)
227
		(UnknownLoading 0)
228
		(PinShape )
229
		(DIFF_PAIR_PINS_POS )
230
		(DIFF_PAIR_PINS_NEG )
231
	)
232

  
233
	(Pin
234
		(Name LOUT)
235
		(MSB )
236
		(LSB )
237
		(Type OUTPUT)
238
		(Location Left)
239
		(InputLoadLow )
240
		(InputLoadHigh )
241
		(OutputLoadLow 1.0)
242
		(OutputLoadHigh -1.0)
243
		(CheckLoad Both)
244
		(CheckIO Both)
245
		(CheckDir 1)
246
		(CheckAssert 1)
247
		(CheckOutput 1)
248
		(UnknownLoading 0)
249
		(PinShape )
250
		(DIFF_PAIR_PINS_POS )
251
		(DIFF_PAIR_PINS_NEG )
252
	)
253

  
254
	(Pin
255
		(Name ROUT)
256
		(MSB )
257
		(LSB )
258
		(Type OUTPUT)
259
		(Location Left)
260
		(InputLoadLow )
261
		(InputLoadHigh )
262
		(OutputLoadLow 1.0)
263
		(OutputLoadHigh -1.0)
264
		(CheckLoad Both)
265
		(CheckIO Both)
266
		(CheckDir 1)
267
		(CheckAssert 1)
268
		(CheckOutput 1)
269
		(UnknownLoading 0)
270
		(PinShape )
271
		(DIFF_PAIR_PINS_POS )
272
		(DIFF_PAIR_PINS_NEG )
273
	)
274

  
275
	(Pin
276
		(Name AVDD)
277
		(MSB )
278
		(LSB )
279
		(Type POWER)
280
		(Location Left)
281
		(InputLoadLow )
282
		(InputLoadHigh )
283
		(OutputLoadLow )
284
		(OutputLoadHigh )
285
		(CheckLoad Off)
286
		(CheckIO Off)
287
		(CheckDir 0)
288
		(CheckAssert 0)
289
		(CheckOutput 0)
290
		(UnknownLoading 0)
291
		(PinShape )
292
		(DIFF_PAIR_PINS_POS )
293
		(DIFF_PAIR_PINS_NEG )
294
	)
295

  
296
	(Pin
297
		(Name AGND)
298
		(MSB )
299
		(LSB )
300
		(Type GROUND)
301
		(Location Right)
302
		(InputLoadLow )
303
		(InputLoadHigh )
304
		(OutputLoadLow )
305
		(OutputLoadHigh )
306
		(CheckLoad Off)
307
		(CheckIO Off)
308
		(CheckDir 0)
309
		(CheckAssert 0)
310
		(CheckOutput 0)
311
		(UnknownLoading 0)
312
		(PinShape )
313
		(DIFF_PAIR_PINS_POS )
314
		(DIFF_PAIR_PINS_NEG )
315
	)
316

  
317
	(Pin
318
		(Name VMID)
319
		(MSB )
320
		(LSB )
321
		(Type OUTPUT)
322
		(Location Right)
323
		(InputLoadLow )
324
		(InputLoadHigh )
325
		(OutputLoadLow 1.0)
326
		(OutputLoadHigh -1.0)
327
		(CheckLoad Both)
328
		(CheckIO Both)
329
		(CheckDir 1)
330
		(CheckAssert 1)
331
		(CheckOutput 1)
332
		(UnknownLoading 0)
333
		(PinShape )
334
		(DIFF_PAIR_PINS_POS )
335
		(DIFF_PAIR_PINS_NEG )
336
	)
337

  
338
	(Pin
339
		(Name MICBIAS)
340
		(MSB )
341
		(LSB )
342
		(Type OUTPUT)
343
		(Location Right)
344
		(InputLoadLow )
345
		(InputLoadHigh )
346
		(OutputLoadLow 1.0)
347
		(OutputLoadHigh -1.0)
348
		(CheckLoad Both)
349
		(CheckIO Both)
350
		(CheckDir 1)
351
		(CheckAssert 1)
352
		(CheckOutput 1)
353
		(UnknownLoading 0)
354
		(PinShape )
355
		(DIFF_PAIR_PINS_POS )
356
		(DIFF_PAIR_PINS_NEG )
357
	)
358

  
359
	(Pin
360
		(Name MICIN)
361
		(MSB )
362
		(LSB )
363
		(Type INPUT)
364
		(Location Right)
365
		(InputLoadLow -0.01)
366
		(InputLoadHigh 0.01)
367
		(OutputLoadLow )
368
		(OutputLoadHigh )
369
		(CheckLoad Both)
370
		(CheckIO Both)
371
		(CheckDir 1)
372
		(CheckAssert 1)
373
		(CheckOutput 1)
374
		(UnknownLoading 0)
375
		(PinShape )
376
		(DIFF_PAIR_PINS_POS )
377
		(DIFF_PAIR_PINS_NEG )
378
	)
379

  
380
	(Pin
381
		(Name RLINEIN)
382
		(MSB )
383
		(LSB )
384
		(Type INPUT)
385
		(Location Right)
386
		(InputLoadLow -0.01)
387
		(InputLoadHigh 0.01)
388
		(OutputLoadLow )
389
		(OutputLoadHigh )
390
		(CheckLoad Both)
391
		(CheckIO Both)
392
		(CheckDir 1)
393
		(CheckAssert 1)
394
		(CheckOutput 1)
395
		(UnknownLoading 0)
396
		(PinShape )
397
		(DIFF_PAIR_PINS_POS )
398
		(DIFF_PAIR_PINS_NEG )
399
	)
400

  
401
	(Pin
402
		(Name MODE)
403
		(MSB )
404
		(LSB )
405
		(Type INPUT)
406
		(Location Right)
407
		(InputLoadLow -0.01)
408
		(InputLoadHigh 0.01)
409
		(OutputLoadLow )
410
		(OutputLoadHigh )
411
		(CheckLoad Both)
412
		(CheckIO Both)
413
		(CheckDir 1)
414
		(CheckAssert 1)
415
		(CheckOutput 1)
416
		(UnknownLoading 0)
417
		(PinShape )
418
		(DIFF_PAIR_PINS_POS )
419
		(DIFF_PAIR_PINS_NEG )
420
	)
421

  
422
	(Pin
423
		(Name CSB)
424
		(MSB )
425
		(LSB )
426
		(Type INPUT)
427
		(Location Right)
428
		(InputLoadLow -0.01)
429
		(InputLoadHigh 0.01)
430
		(OutputLoadLow )
431
		(OutputLoadHigh )
432
		(CheckLoad Both)
433
		(CheckIO Both)
434
		(CheckDir 1)
435
		(CheckAssert 1)
436
		(CheckOutput 1)
437
		(UnknownLoading 0)
438
		(PinShape )
439
		(DIFF_PAIR_PINS_POS )
440
		(DIFF_PAIR_PINS_NEG )
441
	)
442

  
443
	(Pin
444
		(Name SDIN)
445
		(MSB )
446
		(LSB )
447
		(Type INPUT)
448
		(Location Right)
449
		(InputLoadLow -0.01)
450
		(InputLoadHigh 0.01)
451
		(OutputLoadLow )
452
		(OutputLoadHigh )
453
		(CheckLoad Both)
454
		(CheckIO Both)
455
		(CheckDir 1)
456
		(CheckAssert 1)
457
		(CheckOutput 1)
458
		(UnknownLoading 0)
459
		(PinShape )
460
		(DIFF_PAIR_PINS_POS )
461
		(DIFF_PAIR_PINS_NEG )
462
	)
463

  
464
	(Pin
465
		(Name SCLK)
466
		(MSB )
467
		(LSB )
468
		(Type INPUT)
469
		(Location Right)
470
		(InputLoadLow -0.01)
471
		(InputLoadHigh 0.01)
472
		(OutputLoadLow )
473
		(OutputLoadHigh )
474
		(CheckLoad Both)
475
		(CheckIO Both)
476
		(CheckDir 1)
477
		(CheckAssert 1)
478
		(CheckOutput 1)
479
		(UnknownLoading 0)
480
		(PinShape )
481
		(DIFF_PAIR_PINS_POS )
482
		(DIFF_PAIR_PINS_NEG )
483
	)
484

  
485
	(Pin
486
		(Name XTI/MCLK)
487
		(MSB )
488
		(LSB )
489
		(Type INPUT)
490
		(Location Right)
491
		(InputLoadLow -0.01)
492
		(InputLoadHigh 0.01)
493
		(OutputLoadLow )
494
		(OutputLoadHigh )
495
		(CheckLoad Both)
496
		(CheckIO Both)
497
		(CheckDir 1)
498
		(CheckAssert 1)
499
		(CheckOutput 1)
500
		(UnknownLoading 0)
501
		(PinShape )
502
		(DIFF_PAIR_PINS_POS )
503
		(DIFF_PAIR_PINS_NEG )
504
	)
505

  
506
	(Pin
507
		(Name XTO)
508
		(MSB )
509
		(LSB )
510
		(Type OUTPUT)
511
		(Location Right)
512
		(InputLoadLow )
513
		(InputLoadHigh )
514
		(OutputLoadLow 1.0)
515
		(OutputLoadHigh -1.0)
516
		(CheckLoad Both)
517
		(CheckIO Both)
518
		(CheckDir 1)
519
		(CheckAssert 1)
520
		(CheckOutput 1)
521
		(UnknownLoading 0)
522
		(PinShape )
523
		(DIFF_PAIR_PINS_POS )
524
		(DIFF_PAIR_PINS_NEG )
525
	)
526

  
527
	(Pin
528
		(Name DCVDD)
529
		(MSB )
530
		(LSB )
531
		(Type POWER)
532
		(Location Right)
533
		(InputLoadLow )
534
		(InputLoadHigh )
535
		(OutputLoadLow )
536
		(OutputLoadHigh )
537
		(CheckLoad Off)
538
		(CheckIO Off)
539
		(CheckDir 0)
540
		(CheckAssert 0)
541
		(CheckOutput 0)
542
		(UnknownLoading 0)
543
		(PinShape )
544
		(DIFF_PAIR_PINS_POS )
545
		(DIFF_PAIR_PINS_NEG )
546
	)
547

  
548
	(Pin
549
		(Name DGND)
550
		(MSB )
551
		(LSB )
552
		(Type GROUND)
553
		(Location Right)
554
		(InputLoadLow )
555
		(InputLoadHigh )
556
		(OutputLoadLow )
557
		(OutputLoadHigh )
558
		(CheckLoad Off)
559
		(CheckIO Off)
560
		(CheckDir 0)
561
		(CheckAssert 0)
562
		(CheckOutput 0)
563
		(UnknownLoading 0)
564
		(PinShape )
565
		(DIFF_PAIR_PINS_POS )
566
		(DIFF_PAIR_PINS_NEG )
567
	)
568

  
569
	(Pin
570
		(Name LLINEIN)
571
		(MSB )
572
		(LSB )
573
		(Type INPUT)
574
		(Location Right)
575
		(InputLoadLow -0.01)
576
		(InputLoadHigh 0.01)
577
		(OutputLoadLow )
578
		(OutputLoadHigh )
579
		(CheckLoad Both)
580
		(CheckIO Both)
581
		(CheckDir 1)
582
		(CheckAssert 1)
583
		(CheckOutput 1)
584
		(UnknownLoading 0)
585
		(PinShape )
586
		(DIFF_PAIR_PINS_POS )
587
		(DIFF_PAIR_PINS_NEG )
588
	)
589

  
590

  
591
)
trunk/librairies/polytech_ge_beta/wm8731/metadata/master.tag
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105
							(Time	10/22/10,13:49:47)
106

  
107
							(User	adervaul)
108

  
109
							(Path	_polytech_ge_beta.wm8731)
110

  
111
						)
112

  
113
					)
114

  
115
					(LogicalPhysicalPartRelation	
116

  
117
						(LogicalPart	WM8731
118

  
119
							(PackType	WM8731)
120

  
121
						)
122

  
123
					)
124

  
125
					(Packages	1
126

  
127
						(FunctionGroups	1
128

  
129
							(FunctionGroup	1[1]
130

  
131
								(Linkages	
132

  
133
									(Linkage	Symbol
134

  
135
										(Name	sym_1)
136

  
137
									)
138

  
139
								)
140

  
141
							)
142

  
143
						)
144

  
145
						(Linkages	
146

  
147
							(DefaultFootPrint	
148

  
149
								(Name	ssop28)
150

  
151
							)
152

  
153
						)
154

  
155
					)
156

  
157
				)
158

  
159
			)
160

  
161
		)
162

  
163
		(Checksum	000000001bc50385)
164

  
165
	)
166

  
167
	(VersionInfoBlock	
168

  
169
		(ToolName	PDV)
170

  
171
		(Version	16.01-s021 (v16-1-53AR))
172

  
173
		(License	Concept_HDL_expert)
174

  
175
	)
176

  
177
	(Checksum	000000001c5f037c)
178

  
179
)
180

  
trunk/librairies/polytech_ge_beta/wm8731/metadata/packages/WM8731.list
1
AVDD
2
ROUT
3
LOUT
4
HPGND
5
RHPOUT
6
LHPOUT
7
DBVDD
8
DACLRC
9
ADCDAT
10
ADCLRC
11
HPVDD
12
CLKOUT
13
DACDAT
14
BCLK
15
DCVDD
16
SDIN
17
RLINEIN
18
MICBIAS
19
DGND
20
AGND
21
VMID
22
MICIN
23
LLINEIN
24
MODE
25
CSB
26
SCLK
27
XTI/MCLK
28
XTO
trunk/librairies/polytech_ge_beta/wm8731/chips/master.tag
1
chips.prt
trunk/librairies/polytech_ge_beta/wm8731/chips/chips.prt
1
FILE_TYPE=LIBRARY_PARTS;
2
primitive 'WM8731';
3
  pin
4
    'DBVDD':
5
      PIN_NUMBER='(1)';
6
      PINUSE='POWER';
7
      NO_LOAD_CHECK='Both';
8
      NO_IO_CHECK='Both';
9
      NO_ASSERT_CHECK='TRUE';
10
      NO_DIR_CHECK='TRUE';
11
      ALLOW_CONNECT='TRUE';
12
    'CLKOUT':
13
      PIN_NUMBER='(2)';
14
      OUTPUT_LOAD='(1.0,-1.0)';
15
    'BCLK':
16
      PIN_NUMBER='(3)';
17
      INPUT_LOAD='(-0.01,0.01)';
18
    'DACDAT':
19
      PIN_NUMBER='(4)';
20
      INPUT_LOAD='(-0.01,0.01)';
21
    'DACLRC':
22
      PIN_NUMBER='(5)';
23
      INPUT_LOAD='(-0.01,0.01)';
24
    'ADCDAT':
25
      PIN_NUMBER='(6)';
26
      OUTPUT_LOAD='(1.0,-1.0)';
27
    'ADCLRC':
28
      PIN_NUMBER='(7)';
29
      INPUT_LOAD='(-0.01,0.01)';
30
    'HPVDD':
31
      PIN_NUMBER='(8)';
32
      PINUSE='POWER';
33
      NO_LOAD_CHECK='Both';
34
      NO_IO_CHECK='Both';
35
      NO_ASSERT_CHECK='TRUE';
36
      NO_DIR_CHECK='TRUE';
37
      ALLOW_CONNECT='TRUE';
38
    'LHPOUT':
39
      PIN_NUMBER='(9)';
40
      OUTPUT_LOAD='(1.0,-1.0)';
41
    'RHPOUT':
42
      PIN_NUMBER='(10)';
43
      OUTPUT_LOAD='(1.0,-1.0)';
44
    'HPGND':
45
      PIN_NUMBER='(11)';
46
      PINUSE='GROUND';
47
      NO_LOAD_CHECK='Both';
48
      NO_IO_CHECK='Both';
49
      NO_ASSERT_CHECK='TRUE';
50
      NO_DIR_CHECK='TRUE';
51
      ALLOW_CONNECT='TRUE';
52
    'LOUT':
53
      PIN_NUMBER='(12)';
54
      OUTPUT_LOAD='(1.0,-1.0)';
55
    'ROUT':
56
      PIN_NUMBER='(13)';
57
      OUTPUT_LOAD='(1.0,-1.0)';
58
    'AVDD':
59
      PIN_NUMBER='(14)';
60
      PINUSE='POWER';
61
      NO_LOAD_CHECK='Both';
62
      NO_IO_CHECK='Both';
63
      NO_ASSERT_CHECK='TRUE';
64
      NO_DIR_CHECK='TRUE';
65
      ALLOW_CONNECT='TRUE';
66
    'AGND':
67
      PIN_NUMBER='(15)';
68
      PINUSE='GROUND';
69
      NO_LOAD_CHECK='Both';
70
      NO_IO_CHECK='Both';
71
      NO_ASSERT_CHECK='TRUE';
72
      NO_DIR_CHECK='TRUE';
73
      ALLOW_CONNECT='TRUE';
74
    'VMID':
75
      PIN_NUMBER='(16)';
76
      OUTPUT_LOAD='(1.0,-1.0)';
77
    'MICBIAS':
78
      PIN_NUMBER='(17)';
79
      OUTPUT_LOAD='(1.0,-1.0)';
80
    'MICIN':
81
      PIN_NUMBER='(18)';
82
      INPUT_LOAD='(-0.01,0.01)';
83
    'RLINEIN':
84
      PIN_NUMBER='(19)';
85
      INPUT_LOAD='(-0.01,0.01)';
86
    'LLINEIN':
87
      PIN_NUMBER='(20)';
88
      INPUT_LOAD='(-0.01,0.01)';
89
    'MODE':
90
      PIN_NUMBER='(21)';
91
      INPUT_LOAD='(-0.01,0.01)';
92
    'CSB':
93
      PIN_NUMBER='(22)';
94
      INPUT_LOAD='(-0.01,0.01)';
95
    'SDIN':
96
      PIN_NUMBER='(23)';
97
      INPUT_LOAD='(-0.01,0.01)';
98
    'SCLK':
99
      PIN_NUMBER='(24)';
100
      INPUT_LOAD='(-0.01,0.01)';
101
    'XTI/MCLK':
102
      PIN_NUMBER='(25)';
103
      INPUT_LOAD='(-0.01,0.01)';
104
    'XTO':
105
      PIN_NUMBER='(26)';
106
      OUTPUT_LOAD='(1.0,-1.0)';
107
    'DCVDD':
108
      PIN_NUMBER='(27)';
109
      PINUSE='POWER';
110
      NO_LOAD_CHECK='Both';
111
      NO_IO_CHECK='Both';
112
      NO_ASSERT_CHECK='TRUE';
113
      NO_DIR_CHECK='TRUE';
114
      ALLOW_CONNECT='TRUE';
115
    'DGND':
116
      PIN_NUMBER='(28)';
117
      PINUSE='GROUND';
118
      NO_LOAD_CHECK='Both';
119
      NO_IO_CHECK='Both';
120
      NO_ASSERT_CHECK='TRUE';
121
      NO_DIR_CHECK='TRUE';
122
      ALLOW_CONNECT='TRUE';
123
  end_pin;
124
  body
125
    PART_NAME='WM8731';
126
    BODY_NAME='WM8731';
127
    JEDEC_TYPE='ssop28';
128
    PHYS_DES_PREFIX='U';
129
    CLASS='IC';
130
  end_body;
131
end_primitive;
132

  
133
END.
trunk/librairies/polytech_ge_beta/wm8731/sym_1/master.tag
1
symbol.css
trunk/librairies/polytech_ge_beta/wm8731/sym_1/symbol.css
1
C 250 -250 "VMID" 275 -250 0 1 29 0 L
2
X "PIN_TEXT" "VMID" 190 -250 0.00 0.00 23 0 0 2 0 0 1 0 0
3
C 250 -300 "AGND" 275 -300 0 1 29 0 L
4
X "PIN_TEXT" "AGND" 190 -300 0.00 0.00 23 0 0 2 0 0 1 0 0
5
C 250 300 "DCVDD" 275 300 0 1 29 0 L
6
X "PIN_TEXT" "DCVDD" 190 300 0.00 0.00 23 0 0 2 0 0 1 0 0
7
C 250 350 "DGND" 275 350 0 1 29 0 L
8
X "PIN_TEXT" "DGND" 190 350 0.00 0.00 23 0 0 2 0 0 1 0 0
9
C 250 -100 "RLINEIN" 275 -100 0 1 29 0 L
10
X "PIN_TEXT" "RLINEIN" 190 -100 0.00 0.00 23 0 0 2 0 0 1 0 0
11
C 250 -150 "MICIN" 275 -150 0 1 29 0 L
12
X "PIN_TEXT" "MICIN" 190 -150 0.00 0.00 23 0 0 2 0 0 1 0 0
13
C 250 -200 "MICBIAS" 275 -200 0 1 29 0 L
14
X "PIN_TEXT" "MICBIAS" 190 -200 0.00 0.00 23 0 0 2 0 0 1 0 0
15
C -250 350 "DBVDD" -275 350 0 1 29 0 R
16
X "PIN_TEXT" "DBVDD" -190 350 0.00 0.00 23 0 0 0 0 0 1 0 0
17
C -250 250 "BCLK" -275 250 0 1 29 0 R
18
X "PIN_TEXT" "BCLK" -190 250 0.00 0.00 23 0 0 0 0 0 1 0 0
19
C -250 200 "DACDAT" -275 200 0 1 29 0 R
20
X "PIN_TEXT" "DACDAT" -190 200 0.00 0.00 23 0 0 0 0 0 1 0 0
21
C -250 300 "CLKOUT" -275 300 0 1 29 0 R
22
X "PIN_TEXT" "CLKOUT" -190 300 0.00 0.00 23 0 0 0 0 0 1 0 0
23
C -250 50 "ADCLRC" -275 50 0 1 29 0 R
24
X "PIN_TEXT" "ADCLRC" -190 50 0.00 0.00 23 0 0 0 0 0 1 0 0
25
C -250 100 "ADCDAT" -275 100 0 1 29 0 R
26
X "PIN_TEXT" "ADCDAT" -190 100 0.00 0.00 23 0 0 0 0 0 1 0 0
27
C -250 150 "DACLRC" -275 150 0 1 29 0 R
28
X "PIN_TEXT" "DACLRC" -190 150 0.00 0.00 23 0 0 0 0 0 1 0 0
29
C -250 0 "HPVDD" -275 0 0 1 29 0 R
30
X "PIN_TEXT" "HPVDD" -190 0 0.00 0.00 23 0 0 0 0 0 1 0 0
31
C -250 -50 "LHPOUT" -275 -50 0 1 29 0 R
32
X "PIN_TEXT" "LHPOUT" -190 -50 0.00 0.00 23 0 0 0 0 0 1 0 0
33
C -250 -100 "RHPOUT" -275 -100 0 1 29 0 R
34
X "PIN_TEXT" "RHPOUT" -190 -100 0.00 0.00 23 0 0 0 0 0 1 0 0
35
C -250 -150 "HPGND" -275 -150 0 1 29 0 R
36
X "PIN_TEXT" "HPGND" -190 -150 0.00 0.00 23 0 0 0 0 0 1 0 0
37
C -250 -200 "LOUT" -275 -200 0 1 29 0 R
38
X "PIN_TEXT" "LOUT" -190 -200 0.00 0.00 23 0 0 0 0 0 1 0 0
39
C -250 -250 "ROUT" -275 -250 0 1 29 0 R
40
X "PIN_TEXT" "ROUT" -190 -250 0.00 0.00 23 0 0 0 0 0 1 0 0
41
C -250 -300 "AVDD" -275 -300 0 1 29 0 R
42
X "PIN_TEXT" "AVDD" -190 -300 0.00 0.00 23 0 0 0 0 0 1 0 0
43
C 250 -50 "LLINEIN" 275 -50 0 1 29 0 L
44
X "PIN_TEXT" "LLINEIN" 190 -50 0.00 0.00 23 0 0 2 0 0 1 0 0
45
C 250 0 "MODE" 275 0 0 1 29 0 L
46
X "PIN_TEXT" "MODE" 190 0 0.00 0.00 23 0 0 2 0 0 1 0 0
47
C 250 50 "CSB" 275 50 0 1 29 0 L
48
X "PIN_TEXT" "CSB" 190 50 0.00 0.00 23 0 0 2 0 0 1 0 0
49
C 250 100 "SDIN" 275 100 0 1 29 0 L
50
X "PIN_TEXT" "SDIN" 190 100 0.00 0.00 23 0 0 2 0 0 1 0 0
51
C 250 150 "SCLK" 275 150 0 1 29 0 L
52
X "PIN_TEXT" "SCLK" 190 150 0.00 0.00 23 0 0 2 0 0 1 0 0
53
C 250 200 "XTI/MCLK" 275 200 0 1 29 0 L
54
X "PIN_TEXT" "XTI/MCLK" 190 200 0.00 0.00 23 0 0 2 0 0 1 0 0
55
C 250 250 "XTO" 275 250 0 1 29 0 L
56
X "PIN_TEXT" "XTO" 190 250 0.00 0.00 23 0 0 2 0 0 1 0 0
57
L -200 400 200 400 -1 0
58
L -200 400 -200 -325 -1 0
59
L 200 400 200 -325 -1 0
60
L -200 -325 200 -325 -1 0
61
L 250 300 200 300 -1 0
62
L 250 -50 200 -50 -1 0
63
L -250 -300 -200 -300 -1 0
64
L -250 -50 -200 -50 -1 0
65
L -250 -100 -200 -100 -1 0
66
L -250 -150 -200 -150 -1 0
67
L -250 -200 -200 -200 -1 0
68
L -250 -250 -200 -250 -1 0
69
L -250 0 -200 0 -1 0
70
L -250 250 -200 250 -1 0
71
L -250 200 -200 200 -1 0
72
L -250 50 -200 50 -1 0
73
L -250 100 -200 100 -1 0
74
L -250 150 -200 150 -1 0
75
L -250 300 -200 300 -1 0
76
L -250 350 -200 350 -1 0
77
L 250 -300 200 -300 -1 0
78
L 250 -250 200 -250 -1 0
79
L 250 -100 200 -100 -1 0
80
L 250 -150 200 -150 -1 0
81
L 250 -200 200 -200 -1 0
82
L 250 0 200 0 -1 0
83
L 250 200 200 200 -1 0
84
L 250 250 200 250 -1 0
85
L 250 150 200 150 -1 0
86
L 250 50 200 50 -1 0
87
L 250 100 200 100 -1 0
88
L 250 350 200 350 -1 0
89
T -25 408 0.00 0.00 29 0 0 1 0 6 0
90
wm8731
91
P "CDS_LMAN_SYM_OUTLINE" "-200,350,200,-350" 0 25 0.00 0.00 22 0 0 0 0 0 0 0 0
trunk/librairies/polytech_ge_beta/wm8731/entity/master.tag
1
verilog.v
trunk/librairies/polytech_ge_beta/wm8731/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct 22, 2010  15:28:24
trunk/librairies/polytech_ge_beta/wm8731/entity/verilog.v
1
// generated by newgenasym  Fri Oct 22 15:52:52 2010
2

  
3

  
4
module wm8731 (adcdat, adclrc, agnd, avdd, bclk, clkout, csb, dacdat,
5
        daclrc, dbvdd, dcvdd, dgnd, hpgnd, hpvdd, lhpout, llinein,
6
        lout, micbias, micin, mode, rhpout, rlinein, rout, sclk, sdin,
7
        vmid, \xti/mclk , xto);
8
    output adcdat;
9
    input adclrc;
10
    input agnd;
11
    input avdd;
12
    input bclk;
13
    output clkout;
14
    input csb;
15
    input dacdat;
16
    input daclrc;
17
    input dbvdd;
18
    input dcvdd;
19
    input dgnd;
20
    input hpgnd;
21
    input hpvdd;
22
    output lhpout;
23
    input llinein;
24
    output lout;
25
    output micbias;
26
    input micin;
27
    input mode;
28
    output rhpout;
29
    input rlinein;
30
    output rout;
31
    input sclk;
32
    input sdin;
33
    output vmid;
34
    input \xti/mclk ;
35
    output xto;
36

  
37

  
38
    initial
39
        begin
40
        end
41

  
42
endmodule
trunk/librairies/polytech_ge_beta/wm8731/entity/vhdl.vhd
1
-- generated by newgenasym Fri Oct 22 15:52:52 2010
2

  
3
library ieee;
4
use     ieee.std_logic_1164.all;
5
use     work.all;
6
entity WM8731 is
7
    port (    
8
	ADCDAT:    OUT    STD_LOGIC;    
9
	ADCLRC:    IN     STD_LOGIC;    
10
	AGND:      IN     STD_LOGIC;    
11
	AVDD:      IN     STD_LOGIC;    
12
	BCLK:      IN     STD_LOGIC;    
13
	CLKOUT:    OUT    STD_LOGIC;    
14
	CSB:       IN     STD_LOGIC;    
15
	DACDAT:    IN     STD_LOGIC;    
16
	DACLRC:    IN     STD_LOGIC;    
17
	DBVDD:     IN     STD_LOGIC;    
18
	DCVDD:     IN     STD_LOGIC;    
19
	DGND:      IN     STD_LOGIC;    
20
	HPGND:     IN     STD_LOGIC;    
21
	HPVDD:     IN     STD_LOGIC;    
22
	LHPOUT:    OUT    STD_LOGIC;    
23
	LLINEIN:   IN     STD_LOGIC;    
24
	LOUT:      OUT    STD_LOGIC;    
25
	MICBIAS:   OUT    STD_LOGIC;    
26
	MICIN:     IN     STD_LOGIC;    
27
	MODE:      IN     STD_LOGIC;    
28
	RHPOUT:    OUT    STD_LOGIC;    
29
	RLINEIN:   IN     STD_LOGIC;    
30
	ROUT:      OUT    STD_LOGIC;    
31
	SCLK:      IN     STD_LOGIC;    
32
	SDIN:      IN     STD_LOGIC;    
33
	VMID:      OUT    STD_LOGIC;    
34
	\xti/mclk\: IN     STD_LOGIC;    
35
	XTO:       OUT    STD_LOGIC);
36
end WM8731;

Also available in: Unified diff