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psd-data / trunk / librairies / polytech_ge_beta / ssop28 / entity / vhdl.vhd @ 200

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-- generated by newgenasym Fri Oct 15 17:04:02 2010
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library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity SSOP28 is
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    port (    
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	\1\:       IN     STD_LOGIC;    
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	\11\:      IN     STD_LOGIC;    
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	\14\:      IN     STD_LOGIC;    
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	\15\:      IN     STD_LOGIC;    
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	\27\:      IN     STD_LOGIC;    
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	\28\:      IN     STD_LOGIC;    
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	\8\:       IN     STD_LOGIC;    
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	IO10:      INOUT  STD_LOGIC;    
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	IO12:      INOUT  STD_LOGIC;    
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	IO13:      INOUT  STD_LOGIC;    
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	IO16:      INOUT  STD_LOGIC;    
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	IO17:      INOUT  STD_LOGIC;    
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	IO18:      INOUT  STD_LOGIC;    
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	IO19:      INOUT  STD_LOGIC;    
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	IO2:       INOUT  STD_LOGIC;    
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	IO20:      INOUT  STD_LOGIC;    
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	IO21:      INOUT  STD_LOGIC;    
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	IO22:      INOUT  STD_LOGIC;    
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	IO23:      INOUT  STD_LOGIC;    
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	IO24:      INOUT  STD_LOGIC;    
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	IO25:      INOUT  STD_LOGIC;    
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	IO26:      INOUT  STD_LOGIC;    
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	IO3:       INOUT  STD_LOGIC;    
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	IO4:       INOUT  STD_LOGIC;    
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	IO5:       INOUT  STD_LOGIC;    
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	IO6:       INOUT  STD_LOGIC;    
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	IO7:       INOUT  STD_LOGIC;    
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	IO9:       INOUT  STD_LOGIC);
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end SSOP28;