Revision 188

View differences:

trunk/librairies/polytech_ge/relais_g5v1/cfg_analog/master.tag
1
expand.cfg
trunk/librairies/polytech_ge/relais_g5v1/cfg_analog/expand.cfg
1
config relais_g5v1;
2
design _polytech_ge.relais_g5v1:sch_1;
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liblist carte_commutation_lib, standard, _polytech_ge, _polytech_ge_beta;
4
viewlist awb_model, awb_dev, vhdla, vloga, spectrehdl, spice_1, sch_1, entity;
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stoplist awb_model, awb_dev, vhdla, vloga, spectrehdl;
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endconfig
trunk/librairies/polytech_ge/relais_g5v1/metadata/pinlist.txt
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(Pinlist
2
	(Pin
3
		(Name 1)
4
		(MSB )
5
		(LSB )
6
		(Type ANALOG)
7
		(Location Left)
8
		(InputLoadLow )
9
		(InputLoadHigh )
10
		(OutputLoadLow )
11
		(OutputLoadHigh )
12
		(CheckLoad Off)
13
		(CheckIO Off)
14
		(CheckDir 0)
15
		(CheckAssert 0)
16
		(CheckOutput 0)
17
		(UnknownLoading 0)
18
		(PinShape Line)
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
21
	)
22

  
23
	(Pin
24
		(Name 2)
25
		(MSB )
26
		(LSB )
27
		(Type ANALOG)
28
		(Location Left)
29
		(InputLoadLow )
30
		(InputLoadHigh )
31
		(OutputLoadLow )
32
		(OutputLoadHigh )
33
		(CheckLoad Off)
34
		(CheckIO Off)
35
		(CheckDir 0)
36
		(CheckAssert 0)
37
		(CheckOutput 0)
38
		(UnknownLoading 0)
39
		(PinShape Line)
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
42
	)
43

  
44
	(Pin
45
		(Name 3)
46
		(MSB )
47
		(LSB )
48
		(Type ANALOG)
49
		(Location Left)
50
		(InputLoadLow )
51
		(InputLoadHigh )
52
		(OutputLoadLow )
53
		(OutputLoadHigh )
54
		(CheckLoad Off)
55
		(CheckIO Off)
56
		(CheckDir 0)
57
		(CheckAssert 0)
58
		(CheckOutput 0)
59
		(UnknownLoading 0)
60
		(PinShape Line)
61
		(DIFF_PAIR_PINS_POS )
62
		(DIFF_PAIR_PINS_NEG )
63
	)
64

  
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	(Pin
66
		(Name 4)
67
		(MSB )
68
		(LSB )
69
		(Type ANALOG)
70
		(Location Left)
71
		(InputLoadLow )
72
		(InputLoadHigh )
73
		(OutputLoadLow )
74
		(OutputLoadHigh )
75
		(CheckLoad Off)
76
		(CheckIO Off)
77
		(CheckDir 0)
78
		(CheckAssert 0)
79
		(CheckOutput 0)
80
		(UnknownLoading 0)
81
		(PinShape Line)
82
		(DIFF_PAIR_PINS_POS )
83
		(DIFF_PAIR_PINS_NEG )
84
	)
85

  
86
	(Pin
87
		(Name 5)
88
		(MSB )
89
		(LSB )
90
		(Type ANALOG)
91
		(Location Left)
92
		(InputLoadLow )
93
		(InputLoadHigh )
94
		(OutputLoadLow )
95
		(OutputLoadHigh )
96
		(CheckLoad Off)
97
		(CheckIO Off)
98
		(CheckDir 0)
99
		(CheckAssert 0)
100
		(CheckOutput 0)
101
		(UnknownLoading 0)
102
		(PinShape Line)
103
		(DIFF_PAIR_PINS_POS )
104
		(DIFF_PAIR_PINS_NEG )
105
	)
106

  
107
	(Pin
108
		(Name 6)
109
		(MSB )
110
		(LSB )
111
		(Type ANALOG)
112
		(Location Left)
113
		(InputLoadLow )
114
		(InputLoadHigh )
115
		(OutputLoadLow )
116
		(OutputLoadHigh )
117
		(CheckLoad Off)
118
		(CheckIO Off)
119
		(CheckDir 0)
120
		(CheckAssert 0)
121
		(CheckOutput 0)
122
		(UnknownLoading 0)
123
		(PinShape Line)
124
		(DIFF_PAIR_PINS_POS )
125
		(DIFF_PAIR_PINS_NEG )
126
	)
127

  
128

  
129
)
trunk/librairies/polytech_ge/relais_g5v1/metadata/master.tag
1
revision.dat
trunk/librairies/polytech_ge/relais_g5v1/metadata/revision.dat
1
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		(Revision	0.0.4)
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		(ModificationStatus	NULL)
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		(Status	Created)
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		(ErrorStatus	0)
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		(CreateInfo	
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			(Time	10/15/10,13:42:35)
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			(User	kbrenet)
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			(Path	_polytech_ge.relais_g5v1)
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		)
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		(LastModifyInfo	
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			(Time	10/15/10,13:55:01)
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			(User	kbrenet)
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			(Path	_polytech_ge.relais_g5v1)
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		)
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	)
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	(Views	
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		(View	Symbol
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			(Symbols	1
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				(Symbol	sym_1
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					(Symbol_Type	Normal)
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					(Checksum	00000000aba89f14)
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.2)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	10/15/10,13:46:49)
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							(User	kbrenet)
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							(Path	_polytech_ge.relais_g5v1)
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						)
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					)
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				)
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			)
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			(Checksum	000000001e9003e1)
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		)
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		(View	Chips
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			(Checksum	000000000ea05579)
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			(Primitives	1
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				(Primitive	RELAIS_G5V1
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.2)
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						(ModificationStatus	NULL)
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99
						(Status	Created)
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101
						(ErrorStatus	0)
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103
						(CreateInfo	
104

  
105
							(Time	10/15/10,13:42:47)
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							(User	kbrenet)
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							(Path	_polytech_ge.relais_g5v1)
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111
						)
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					)
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					(LogicalPhysicalPartRelation	
116

  
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						(LogicalPart	RELAIS_G5V1
118

  
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							(PackType	RELAIS_G5V1)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	relais_g5v1)
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							)
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					)
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		(Checksum	000000001b88037e)
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	(VersionInfoBlock	
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		(ToolName	PDV)
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		(Version	16.01-s021 (v16-1-53AR))
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		(License	PCB_librarian_expert)
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	(Checksum	000000001b9a0383)
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)
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trunk/librairies/polytech_ge/relais_g5v1/chips/master.tag
1
chips.prt
trunk/librairies/polytech_ge/relais_g5v1/chips/chips.prt
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FILE_TYPE=LIBRARY_PARTS;
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primitive 'RELAIS_G5V1';
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  pin
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    '1':
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      PIN_NUMBER='(1)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    '2':
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      PIN_NUMBER='(2)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    '3':
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      PIN_NUMBER='(5)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    '4':
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      PIN_NUMBER='(6)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    '5':
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      PIN_NUMBER='(9)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    '6':
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      PIN_NUMBER='(10)';
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      PIN_TYPE='ANALOG';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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  end_pin;
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  body
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    PART_NAME='RELAIS_G5V1';
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    BODY_NAME='RELAIS_G5V1';
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    JEDEC_TYPE='relais_g5v1';
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    PHYS_DES_PREFIX='U';
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    CLASS='IC';
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  end_body;
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end_primitive;
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END.
trunk/librairies/polytech_ge/relais_g5v1/sym_1/master.tag
1
symbol.css
trunk/librairies/polytech_ge/relais_g5v1/sym_1/symbol.css
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relais_g5v1
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trunk/librairies/polytech_ge/relais_g5v1/psp_sim_1/master.tag
1
relais_g5v1.net
trunk/librairies/polytech_ge/relais_g5v1/psp_sim_1/relais_g5v1.opj
1
(ExpressProject  relais_g5v1
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)
trunk/librairies/polytech_ge/relais_g5v1/entity/master.tag
1
verilog.v
trunk/librairies/polytech_ge/relais_g5v1/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct 15, 2010  13:58:16
trunk/librairies/polytech_ge/relais_g5v1/entity/verilog.v
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// generated by newgenasym  Fri Oct 15 13:58:16 2010
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module relais_g5v1 (\1 , \2 , \3 , \4 , \5 , \6 );
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    inout \1 ;
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    inout \2 ;
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    inout \3 ;
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    inout \4 ;
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    inout \5 ;
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    inout \6 ;
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    initial
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        begin
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        end
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endmodule
trunk/librairies/polytech_ge/relais_g5v1/entity/vhdl.vhd
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-- generated by newgenasym Fri Oct 15 13:58:16 2010
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library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity relais_g5v1 is
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    port (    
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	\1\:       INOUT  STD_LOGIC;    
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	\2\:       INOUT  STD_LOGIC;    
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	\3\:       INOUT  STD_LOGIC;    
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	\4\:       INOUT  STD_LOGIC;    
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	\5\:       INOUT  STD_LOGIC;    
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	\6\:       INOUT  STD_LOGIC);
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end relais_g5v1;
trunk/librairies/polytech_ge/relais_g5v1/sch_1/module_order.dat
1
Version 15.0
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START_MODULEORDER
3
END_MODULEORDER

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