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psd-data / trunk / librairies / polytech_ge_beta / relais_1c_1p / entity / verilog.v @ 157

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// generated by newgenasym  Wed Oct 06 17:24:58 2010
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module relais_1c_1p (\1 , \3 , \5 , \7 );
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    inout \1 ;
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    inout \3 ;
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    inout \5 ;
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    inout \7 ;
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    initial
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        begin
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        end
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endmodule