Revision 104

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trunk/librairies/polytech_ge_beta/he20/sym_1/symbol.css
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L -175 275 -125 275 -1 0
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L -175 325 -125 325 -1 0
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C -200 -250 "P15" -225 -250 0 1 28 0 R
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C -200 100 "P8" -225 100 0 1 28 0 R
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C -200 -450 "GND1" -225 -450 0 1 28 0 R
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C -200 -500 "GND2" -225 -500 0 1 28 0 R
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L -200 -100 -125 -100 -1 0
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L -200 50 -125 50 -1 0
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T 50 400 0.00 0.00 28 0 0 1 0 4 0
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he20
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P "$LOCATION" "?" -125 500 0.00 0.00 28 0 0 0 0 0 1 0 0
trunk/librairies/polytech_ge_beta/he20/entity/master.tag
1
vhdl.vhd
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verilog.v
trunk/librairies/polytech_ge_beta/he20/entity/verilog.v
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// generated by newgenasym  Sat May 20 11:39:54 2006
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// generated by newgenasym  Wed Sep 29 11:14:24 2010
2 2

  
3 3

  
4 4
module he20 (gnd1, gnd2, p1, p10, p11, p12, p13, p14, p15, p16, p2, p3, p4, p5,
trunk/librairies/polytech_ge_beta/he20/entity/vhdl.vhd
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-- generated by newgenasym Sat May 20 11:39:54 2006
1
-- generated by newgenasym Wed Sep 29 11:14:24 2010
2 2

  
3 3
library ieee;
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use     ieee.std_logic_1164.all;
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use     work.all;
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entity he20 is
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entity HE20 is
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    port (    
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	GND1:      IN     STD_LOGIC;    
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	GND2:      IN     STD_LOGIC;    
......
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	P9:        INOUT  STD_LOGIC;    
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	VDD1:      IN     STD_LOGIC;    
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	VDD2:      IN     STD_LOGIC);
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end he20;
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end HE20;

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