Revision 103

View differences:

trunk/librairies/polytech_ge/transformateur_1_2_sym/metadata/pinlist.txt
15 15
		(CheckAssert 0)
16 16
		(CheckOutput 0)
17 17
		(UnknownLoading 0)
18
		(PinShape Line)
18
		(PinShape )
19 19
		(DIFF_PAIR_PINS_POS )
20 20
		(DIFF_PAIR_PINS_NEG )
21 21
	)
......
36 36
		(CheckAssert 0)
37 37
		(CheckOutput 0)
38 38
		(UnknownLoading 0)
39
		(PinShape Line)
39
		(PinShape )
40 40
		(DIFF_PAIR_PINS_POS )
41 41
		(DIFF_PAIR_PINS_NEG )
42 42
	)
......
57 57
		(CheckAssert 0)
58 58
		(CheckOutput 0)
59 59
		(UnknownLoading 0)
60
		(PinShape Line)
60
		(PinShape )
61 61
		(DIFF_PAIR_PINS_POS )
62 62
		(DIFF_PAIR_PINS_NEG )
63 63
	)
......
78 78
		(CheckAssert 0)
79 79
		(CheckOutput 0)
80 80
		(UnknownLoading 0)
81
		(PinShape Line)
81
		(PinShape )
82 82
		(DIFF_PAIR_PINS_POS )
83 83
		(DIFF_PAIR_PINS_NEG )
84 84
	)
......
99 99
		(CheckAssert 0)
100 100
		(CheckOutput 0)
101 101
		(UnknownLoading 0)
102
		(PinShape Line)
102
		(PinShape )
103 103
		(DIFF_PAIR_PINS_POS )
104 104
		(DIFF_PAIR_PINS_NEG )
105 105
	)
......
120 120
		(CheckAssert 0)
121 121
		(CheckOutput 0)
122 122
		(UnknownLoading 0)
123
		(PinShape Line)
123
		(PinShape )
124 124
		(DIFF_PAIR_PINS_POS )
125 125
		(DIFF_PAIR_PINS_NEG )
126 126
	)
trunk/librairies/polytech_ge/transformateur_1_2_sym/metadata/revision.dat
4 4

  
5 5
		(Baselined	0)
6 6

  
7
		(Revision	0.0.11)
7
		(Revision	0.0.13)
8 8

  
9 9
		(ModificationStatus	NULL)
10 10

  
......
24 24

  
25 25
		(LastModifyInfo	
26 26

  
27
			(Time	09/16/10,09:47:39)
27
			(Time	09/29/10,10:24:40)
28 28

  
29
			(User	profs)
29
			(User	spinnete)
30 30

  
31
			(Path	_polytech_ge.transformateur_1_2_sym)
31
			(Path	polytech_ge.transformateur_1_2_sym)
32 32

  
33 33
		)
34 34

  
......
82 82

  
83 83
		(View	Chips
84 84

  
85
			(Checksum	0000000080cbc2a8)
85
			(Checksum	000000009b6dda93)
86 86

  
87
			(Primitives	2
87
			(Primitives	3
88 88

  
89 89
				(Primitive	TRANSFORMATEUR_1_2_SYM_SPK
90 90

  
......
226 226

  
227 227
				)
228 228

  
229
				(Primitive	TRANSFORMATEUR_1_2_SYM_DS44060
230

  
231
					(RevisionInfoBlock	
232

  
233
						(Baselined	0)
234

  
235
						(Revision	0.0.1)
236

  
237
						(ModificationStatus	NULL)
238

  
239
						(Status	Created)
240

  
241
						(ErrorStatus	0)
242

  
243
						(CreateInfo	
244

  
245
							(Time	09/29/10,10:17:19)
246

  
247
							(User	spinnete)
248

  
249
							(Path	polytech_ge.transformateur_1_2_sym)
250

  
251
						)
252

  
253
					)
254

  
255
					(LogicalPhysicalPartRelation	
256

  
257
						(LogicalPart	TRANSFORMATEUR_1_2_SYM
258

  
259
							(PackType	TRANSFORMATEUR_1_2_SYM_DS44060)
260

  
261
						)
262

  
263
					)
264

  
265
					(Packages	1
266

  
267
						(FunctionGroups	1
268

  
269
							(FunctionGroup	1[1]
270

  
271
								(Linkages	
272

  
273
									(Linkage	Symbol
274

  
275
										(Name	sym_1)
276

  
277
									)
278

  
279
								)
280

  
281
							)
282

  
283
						)
284

  
285
						(Linkages	
286

  
287
							(DefaultFootPrint	
288

  
289
								(Name	DS44060)
290

  
291
							)
292

  
293
						)
294

  
295
					)
296

  
297
				)
298

  
229 299
			)
230 300

  
231 301
		)
232 302

  
233
		(Checksum	000000001d9703e6)
303
		(Checksum	000000001f5e043f)
234 304

  
235 305
	)
236 306

  
......
240 310

  
241 311
		(Version	16.01-s021 (v16-1-53AR))
242 312

  
243
		(License	PCB_librarian_expert)
313
		(License	PCB_design_expert)
244 314

  
245 315
	)
246 316

  
247
	(Checksum	000000001bd60384)
317
	(Checksum	000000001c8103af)
248 318

  
249 319
)
250 320

  
trunk/librairies/polytech_ge/transformateur_1_2_sym/chips/chips.prt
120 120
  end_body;
121 121
end_primitive;
122 122

  
123
primitive 'TRANSFORMATEUR_1_2_SYM_DS44060';
124
  pin
125
    'S1P':
126
      PIN_NUMBER='(7)';
127
      PINUSE='UNSPEC';
128
      NO_LOAD_CHECK='Both';
129
      NO_IO_CHECK='Both';
130
      NO_ASSERT_CHECK='TRUE';
131
      NO_DIR_CHECK='TRUE';
132
      ALLOW_CONNECT='TRUE';
133
    'S2P':
134
      PIN_NUMBER='(10)';
135
      PINUSE='UNSPEC';
136
      NO_LOAD_CHECK='Both';
137
      NO_IO_CHECK='Both';
138
      NO_ASSERT_CHECK='TRUE';
139
      NO_DIR_CHECK='TRUE';
140
      ALLOW_CONNECT='TRUE';
141
    'S2N':
142
      PIN_NUMBER='(9)';
143
      PINUSE='UNSPEC';
144
      NO_LOAD_CHECK='Both';
145
      NO_IO_CHECK='Both';
146
      NO_ASSERT_CHECK='TRUE';
147
      NO_DIR_CHECK='TRUE';
148
      ALLOW_CONNECT='TRUE';
149
    'P':
150
      PIN_NUMBER='(1)';
151
      PIN_TYPE='ANALOG';
152
      NO_LOAD_CHECK='Both';
153
      NO_IO_CHECK='Both';
154
      NO_ASSERT_CHECK='TRUE';
155
      NO_DIR_CHECK='TRUE';
156
      ALLOW_CONNECT='TRUE';
157
    'N':
158
      PIN_NUMBER='(5)';
159
      PIN_TYPE='ANALOG';
160
      NO_LOAD_CHECK='Both';
161
      NO_IO_CHECK='Both';
162
      NO_ASSERT_CHECK='TRUE';
163
      NO_DIR_CHECK='TRUE';
164
      ALLOW_CONNECT='TRUE';
165
    'S1N':
166
      PIN_NUMBER='(6)';
167
      PINUSE='UNSPEC';
168
      NO_LOAD_CHECK='Both';
169
      NO_IO_CHECK='Both';
170
      NO_ASSERT_CHECK='TRUE';
171
      NO_DIR_CHECK='TRUE';
172
      ALLOW_CONNECT='TRUE';
173
  end_pin;
174
  body
175
    PART_NAME='TRANSFORMATEUR_1_2_SYM';
176
    BODY_NAME='TRANSFORMATEUR_1_2_SYM';
177
    JEDEC_TYPE='DS44060';
178
    PHYS_DES_PREFIX='U';
179
    CLASS='IC';
180
  end_body;
181
end_primitive;
182

  
123 183
END.
trunk/librairies/polytech_ge/transformateur_1_2_sym/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 16, 2010  09:47:39
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 29, 2010  10:24:44
trunk/librairies/polytech_ge/transformateur_1_2_sym/entity/verilog.v
1
// generated by newgenasym  Thu Sep 16 09:47:39 2010
1
// generated by newgenasym  Wed Sep 29 10:24:44 2010
2 2

  
3 3

  
4 4
module transformateur_1_2_sym (n, p, s1n, s1p, s2n, s2p);
trunk/librairies/polytech_ge/transformateur_1_2_sym/entity/vhdl.vhd
1
-- generated by newgenasym Thu Sep 16 09:47:39 2010
1
-- generated by newgenasym Wed Sep 29 10:24:44 2010
2 2

  
3 3
library ieee;
4 4
use     ieee.std_logic_1164.all;
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/metadata/pinlist.txt
1
(Pinlist
2
	(Pin
3
		(Name IN1)
4
		(MSB )
5
		(LSB )
6
		(Type INPUT)
7
		(Location Left)
8
		(InputLoadLow -0.01)
9
		(InputLoadHigh 0.01)
10
		(OutputLoadLow )
11
		(OutputLoadHigh )
12
		(CheckLoad Both)
13
		(CheckIO Both)
14
		(CheckDir 1)
15
		(CheckAssert 1)
16
		(CheckOutput 1)
17
		(UnknownLoading 0)
18
		(PinShape )
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
21
	)
22

  
23
	(Pin
24
		(Name IN2)
25
		(MSB )
26
		(LSB )
27
		(Type INPUT)
28
		(Location Left)
29
		(InputLoadLow -0.01)
30
		(InputLoadHigh 0.01)
31
		(OutputLoadLow )
32
		(OutputLoadHigh )
33
		(CheckLoad Both)
34
		(CheckIO Both)
35
		(CheckDir 1)
36
		(CheckAssert 1)
37
		(CheckOutput 1)
38
		(UnknownLoading 0)
39
		(PinShape )
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
42
	)
43

  
44
	(Pin
45
		(Name OUT_PLUS)
46
		(MSB )
47
		(LSB )
48
		(Type OUTPUT)
49
		(Location Right)
50
		(InputLoadLow )
51
		(InputLoadHigh )
52
		(OutputLoadLow 1.0)
53
		(OutputLoadHigh -1.0)
54
		(CheckLoad Both)
55
		(CheckIO Both)
56
		(CheckDir 1)
57
		(CheckAssert 1)
58
		(CheckOutput 1)
59
		(UnknownLoading 0)
60
		(PinShape )
61
		(DIFF_PAIR_PINS_POS )
62
		(DIFF_PAIR_PINS_NEG )
63
	)
64

  
65
	(Pin
66
		(Name OUT_MOINS)
67
		(MSB )
68
		(LSB )
69
		(Type OUTPUT)
70
		(Location Right)
71
		(InputLoadLow )
72
		(InputLoadHigh )
73
		(OutputLoadLow 1.0)
74
		(OutputLoadHigh -1.0)
75
		(CheckLoad Both)
76
		(CheckIO Both)
77
		(CheckDir 1)
78
		(CheckAssert 1)
79
		(CheckOutput 1)
80
		(UnknownLoading 0)
81
		(PinShape )
82
		(DIFF_PAIR_PINS_POS )
83
		(DIFF_PAIR_PINS_NEG )
84
	)
85

  
86

  
87
)
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/metadata/master.tag
1
revision.dat
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/metadata/revision.dat
1
(Cell	pont_diode_df02m-e3
2

  
3
	(RevisionInfoBlock	
4

  
5
		(Baselined	0)
6

  
7
		(Revision	0.0.1)
8

  
9
		(ModificationStatus	NULL)
10

  
11
		(Status	Created)
12

  
13
		(ErrorStatus	0)
14

  
15
		(CreateInfo	
16

  
17
			(Time	09/29/10,08:26:39)
18

  
19
			(User	spinnete)
20

  
21
			(Path	polytech_ge_beta.pont_diode_df02m-e3)
22

  
23
		)
24

  
25
		(LastModifyInfo	
26

  
27
			(Time	09/29/10,09:00:22)
28

  
29
			(User	spinnete)
30

  
31
			(Path	polytech_ge_beta.pont_diode_df02m-e3)
32

  
33
		)
34

  
35
	)
36

  
37
	(Views	
38

  
39
		(View	Symbol
40

  
41
			(Symbols	1
42

  
43
				(Symbol	sym_1
44

  
45
					(Symbol_Type	Normal)
46

  
47
					(Max_Size	0)
48

  
49
					(Checksum	00000000693a840a)
50

  
51
					(RevisionInfoBlock	
52

  
53
						(Baselined	0)
54

  
55
						(Revision	0.0.1)
56

  
57
						(ModificationStatus	NULL)
58

  
59
						(Status	Created)
60

  
61
						(ErrorStatus	0)
62

  
63
						(CreateInfo	
64

  
65
							(Time	09/29/10,08:48:54)
66

  
67
							(User	spinnete)
68

  
69
							(Path	polytech_ge_beta.pont_diode_df02m-e3)
70

  
71
						)
72

  
73
					)
74

  
75
				)
76

  
77
			)
78

  
79
			(Checksum	000000001b630381)
80

  
81
		)
82

  
83
		(View	Chips
84

  
85
			(Checksum	00000000950b84e4)
86

  
87
			(Primitives	1
88

  
89
				(Primitive	PONT_DIODE_DF02M-E3
90

  
91
					(RevisionInfoBlock	
92

  
93
						(Baselined	0)
94

  
95
						(Revision	0.0.1)
96

  
97
						(ModificationStatus	NULL)
98

  
99
						(Status	Created)
100

  
101
						(ErrorStatus	0)
102

  
103
						(CreateInfo	
104

  
105
							(Time	09/29/10,08:27:13)
106

  
107
							(User	spinnete)
108

  
109
							(Path	polytech_ge_beta.pont_diode_df02m-e3)
110

  
111
						)
112

  
113
					)
114

  
115
					(LogicalPhysicalPartRelation	
116

  
117
						(LogicalPart	PONT_DIODE_DF02M-E3
118

  
119
							(PackType	PONT_DIODE_DF02M-E3)
120

  
121
						)
122

  
123
					)
124

  
125
					(Packages	1
126

  
127
						(FunctionGroups	1
128

  
129
							(FunctionGroup	1[1]
130

  
131
								(Linkages	
132

  
133
									(Linkage	Symbol
134

  
135
										(Name	sym_1)
136

  
137
									)
138

  
139
								)
140

  
141
							)
142

  
143
						)
144

  
145
						(Linkages	
146

  
147
							(DefaultFootPrint	
148

  
149
								(Name	pont_diode_df02m-e3)
150

  
151
							)
152

  
153
						)
154

  
155
					)
156

  
157
				)
158

  
159
			)
160

  
161
		)
162

  
163
		(Checksum	000000001c960389)
164

  
165
	)
166

  
167
	(VersionInfoBlock	
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169
		(ToolName	PDV)
170

  
171
		(Version	16.01-s021 (v16-1-53AR))
172

  
173
		(License	PCB_design_expert)
174

  
175
	)
176

  
177
	(Checksum	000000001b730358)
178

  
179
)
180

  
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/chips/master.tag
1
chips.prt
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/chips/chips.prt
1
FILE_TYPE=LIBRARY_PARTS;
2
primitive 'PONT_DIODE_DF02M-E3';
3
  pin
4
    'IN1':
5
      PIN_NUMBER='(3)';
6
      INPUT_LOAD='(-0.01,0.01)';
7
    'IN2':
8
      PIN_NUMBER='(4)';
9
      INPUT_LOAD='(-0.01,0.01)';
10
    'OUT_PLUS':
11
      PIN_NUMBER='(1)';
12
      OUTPUT_LOAD='(1.0,-1.0)';
13
    'OUT_MOINS':
14
      PIN_NUMBER='(2)';
15
      OUTPUT_LOAD='(1.0,-1.0)';
16
  end_pin;
17
  body
18
    PART_NAME='PONT_DIODE_DF02M-E3';
19
    BODY_NAME='PONT_DIODE_DF02M-E3';
20
    JEDEC_TYPE='pont_diode_df02m-e3';
21
    PHYS_DES_PREFIX='U';
22
    CLASS='IC';
23
  end_body;
24
end_primitive;
25

  
26
END.
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/sym_1/master.tag
1
symbol.css
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/sym_1/symbol.css
1
P "CDS_LMAN_SYM_OUTLINE" "-175,125,175,-125" 0 0 0.00 0.00 22 0 0 0 0 0 0 0 0
2
L -175 125 -175 -125 -1 0
3
L -175 125 175 125 -1 0
4
L 175 125 175 -125 -1 0
5
L -175 -125 175 -125 -1 0
6
T 0 83 0 0 29 0 0 1 0 19 0
7
pont_diode_df02m-e3
8
L -225 100 -175 100 -1 0
9
C -225 100 "IN1" -250 100 0 1 29 0 R
10
X "PIN_TEXT" "IN1" -165 100 0 0 23 0 0 0 0 0 1 0 0
11
L -225 50 -175 50 -1 0
12
C -225 50 "IN2" -250 50 0 1 29 0 R
13
X "PIN_TEXT" "IN2" -165 50 0 0 23 0 0 0 0 0 1 0 0
14
L 225 100 175 100 -1 0
15
C 225 100 "OUT_PLUS" 250 100 0 1 29 0 L
16
X "PIN_TEXT" "OUT_PLUS" 165 100 0 0 23 0 0 2 0 0 1 0 0
17
L 225 50 175 50 -1 0
18
C 225 50 "OUT_MOINS" 250 50 0 1 29 0 L
19
X "PIN_TEXT" "OUT_MOINS" 165 50 0 0 23 0 0 2 0 0 1 0 0
20

  
21

  
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/entity/master.tag
1
verilog.v
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 29, 2010  09:00:23
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/entity/verilog.v
1
// generated by newgenasym  Wed Sep 29 09:00:23 2010
2

  
3

  
4
module \pont_diode_df02m-e3  (in1, in2, out_moins, out_plus);
5
    input in1;
6
    input in2;
7
    output out_moins;
8
    output out_plus;
9

  
10

  
11
    initial
12
        begin
13
        end
14

  
15
endmodule
trunk/librairies/polytech_ge_beta/pont_diode_df02m#2de3/entity/vhdl.vhd
1
-- generated by newgenasym Wed Sep 29 09:00:23 2010
2

  
3
library ieee;
4
use     ieee.std_logic_1164.all;
5
use     work.all;
6
entity \pont_diode_df02m-e3\ is
7
    port (    
8
	IN1:       IN     STD_LOGIC;    
9
	IN2:       IN     STD_LOGIC;    
10
	OUT_MOINS: OUT    STD_LOGIC;    
11
	OUT_PLUS:  OUT    STD_LOGIC);
12
end \pont_diode_df02m-e3\;
trunk/librairies/polytech_ge_beta/pcb/master.tag
1
DS44060.dra
trunk/librairies/polytech_ge_beta/master.tag
1
traco_ten3.dra
trunk/librairies/polytech_ge_beta/mc_7815/metadata/pinlist.txt
16 16
		(CheckOutput 0)
17 17
		(UnknownLoading 0)
18 18
		(PinShape )
19
		(DIFF_PAIR_PINS_POS )
20
		(DIFF_PAIR_PINS_NEG )
19 21
	)
20 22

  
21 23
	(Pin
......
35 37
		(CheckOutput 0)
36 38
		(UnknownLoading 0)
37 39
		(PinShape )
40
		(DIFF_PAIR_PINS_POS )
41
		(DIFF_PAIR_PINS_NEG )
38 42
	)
39 43

  
40 44
	(Pin
......
54 58
		(CheckOutput 0)
55 59
		(UnknownLoading 0)
56 60
		(PinShape )
61
		(DIFF_PAIR_PINS_POS )
62
		(DIFF_PAIR_PINS_NEG )
57 63
	)
58 64

  
59 65

  
trunk/librairies/polytech_ge_beta/mc_7815/metadata/master.tag
1 1
revision.dat
2
revision.log
3
revhistory.log
4
pinlist.txt
trunk/librairies/polytech_ge_beta/mc_7815/metadata/revision.dat
4 4

  
5 5
		(Baselined	0)
6 6

  
7
		(Revision	0.0.2)
7
		(Revision	0.0.6)
8 8

  
9 9
		(ModificationStatus	NULL)
10 10

  
......
24 24

  
25 25
		(LastModifyInfo	
26 26

  
27
			(Time	10/04/07,17:00:46)
27
			(Time	09/29/10,10:55:23)
28 28

  
29
			(User	projets)
29
			(User	spinnete)
30 30

  
31
			(Path	etudiants.mc_7815)
31
			(Path	polytech_ge_beta.mc_7815)
32 32

  
33 33
		)
34 34

  
......
82 82

  
83 83
		(View	Chips
84 84

  
85
			(Checksum	000000007539c643)
85
			(Checksum	0000000020d9854b)
86 86

  
87
			(Primitives	1
87
			(Primitives	2
88 88

  
89 89
				(Primitive	MC_7815
90 90

  
......
156 156

  
157 157
				)
158 158

  
159
				(Primitive	MC_78L15_TO92
160

  
161
					(RevisionInfoBlock	
162

  
163
						(Baselined	0)
164

  
165
						(Revision	0.0.3)
166

  
167
						(ModificationStatus	NULL)
168

  
169
						(Status	Created)
170

  
171
						(ErrorStatus	0)
172

  
173
						(CreateInfo	
174

  
175
							(Time	09/29/10,10:51:55)
176

  
177
							(User	spinnete)
178

  
179
							(Path	polytech_ge_beta.mc_7815)
180

  
181
						)
182

  
183
					)
184

  
185
					(LogicalPhysicalPartRelation	
186

  
187
						(LogicalPart	MC_78L15
188

  
189
							(PackType	MC_78L15_TO92)
190

  
191
						)
192

  
193
					)
194

  
195
					(Packages	1
196

  
197
						(FunctionGroups	1
198

  
199
							(FunctionGroup	1[1]
200

  
201
								(Linkages	
202

  
203
									(Linkage	Symbol
204

  
205
										(Name	sym_1)
206

  
207
									)
208

  
209
								)
210

  
211
							)
212

  
213
						)
214

  
215
						(Linkages	
216

  
217
							(DefaultFootPrint	
218

  
219
								(Name	to92)
220

  
221
							)
222

  
223
						)
224

  
225
					)
226

  
227
				)
228

  
159 229
			)
160 230

  
161 231
		)
162 232

  
163
		(Checksum	000000001c79038e)
233
		(Checksum	000000001b6a035b)
164 234

  
165 235
	)
166 236

  
......
168 238

  
169 239
		(ToolName	PDV)
170 240

  
171
		(Version	15.70-p003)
241
		(Version	16.01-s021 (v16-1-53AR))
172 242

  
173
		(License	PCB_librarian_expert)
243
		(License	PCB_design_expert)
174 244

  
175 245
	)
176 246

  
177
	(Checksum	000000001ba20385)
247
	(Checksum	000000001c5403a5)
178 248

  
179 249
)
180 250

  
trunk/librairies/polytech_ge_beta/mc_7815/chips/chips.prt
35 35
  end_body;
36 36
end_primitive;
37 37

  
38
primitive 'MC_78L15_TO92';
39
  pin
40
    'IN':
41
      PIN_NUMBER='(3)';
42
      PIN_TYPE='ANALOG';
43
      NO_LOAD_CHECK='Both';
44
      NO_IO_CHECK='Both';
45
      NO_ASSERT_CHECK='TRUE';
46
      NO_DIR_CHECK='TRUE';
47
      ALLOW_CONNECT='TRUE';
48
    'GND':
49
      PIN_NUMBER='(2)';
50
      PINUSE='GROUND';
51
      NO_LOAD_CHECK='Both';
52
      NO_IO_CHECK='Both';
53
      NO_ASSERT_CHECK='TRUE';
54
      NO_DIR_CHECK='TRUE';
55
      ALLOW_CONNECT='TRUE';
56
    'OUT':
57
      PIN_NUMBER='(1)';
58
      PIN_TYPE='ANALOG';
59
      NO_LOAD_CHECK='Both';
60
      NO_IO_CHECK='Both';
61
      NO_ASSERT_CHECK='TRUE';
62
      NO_DIR_CHECK='TRUE';
63
      ALLOW_CONNECT='TRUE';
64
  end_pin;
65
  body
66
    PART_NAME='MC_78L15';
67
    BODY_NAME='MC_7815';
68
    JEDEC_TYPE='to92';
69
    PHYS_DES_PREFIX='U';
70
    CLASS='IC';
71
  end_body;
72
end_primitive;
73

  
38 74
END.
trunk/librairies/polytech_ge_beta/mc_7815/entity/master.tag
1
vhdl.vhd
2 1
verilog.v
trunk/librairies/polytech_ge_beta/mc_7815/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Oct  4, 2007  17:04:30
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 29, 2010  11:01:32
trunk/librairies/polytech_ge_beta/mc_7815/entity/verilog.v
1
// generated by newgenasym  Thu Oct 04 17:04:30 2007
1
// generated by newgenasym  Wed Sep 29 11:01:32 2010
2 2

  
3 3

  
4 4
module mc_7815 (gnd, in, out);
trunk/librairies/polytech_ge_beta/mc_7815/entity/vhdl.vhd
1
-- generated by newgenasym Thu Oct 04 17:04:30 2007
1
-- generated by newgenasym Wed Sep 29 11:01:32 2010
2 2

  
3 3
library ieee;
4 4
use     ieee.std_logic_1164.all;

Also available in: Unified diff