Revision 101

View differences:

trunk/librairies/polytech_ge/pont_diode/metadata/revision.dat
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		(Baselined	0)
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		(Revision	0.0.5)
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		(Revision	0.0.7)
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		(ModificationStatus	NULL)
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......
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		(LastModifyInfo	
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			(Time	09/29/10,09:01:56)
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			(Time	09/29/10,10:14:53)
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			(User	spinnete)
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			(User	profs)
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			(Path	polytech_ge.pont_diode)
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			(Path	_polytech_ge.pont_diode)
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		)
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......
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		(View	Chips
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85
			(Checksum	00000000582debe1)
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			(Checksum	000000000684e049)
86 86

  
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			(Primitives	2
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			(Primitives	3
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				(Primitive	PONT_DIODE_GBPC-W
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......
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				)
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				(Primitive	PONT_DIODE_4A_KBL06
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					(RevisionInfoBlock	
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						(Baselined	0)
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						(Revision	0.0.2)
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						(ModificationStatus	NULL)
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						(Status	Created)
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						(ErrorStatus	0)
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						(CreateInfo	
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							(Time	09/29/10,10:13:07)
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							(User	profs)
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							(Path	_polytech_ge.pont_diode)
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						)
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					)
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					(LogicalPhysicalPartRelation	
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						(LogicalPart	PONT_DIODE
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							(PackType	PONT_DIODE_4A_KBL06)
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						)
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					)
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					(Packages	1
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						(FunctionGroups	1
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							(FunctionGroup	1[1]
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								(Linkages	
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									(Linkage	Symbol
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										(Name	sym_1)
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									)
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								)
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							)
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						)
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						(Linkages	
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							(DefaultFootPrint	
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								(Name	4a_kbl06)
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							)
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						)
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					)
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				)
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			)
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		)
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		(Checksum	000000001cce03c0)
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		(Checksum	000000001c4903df)
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	)
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......
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		(Version	16.01-s021 (v16-1-53AR))
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		(License	PCB_design_expert)
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		(License	PCB_librarian_expert)
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	)
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	(Checksum	000000001da703d3)
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	(Checksum	000000001be903af)
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)
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trunk/librairies/polytech_ge/pont_diode/chips/chips.prt
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  end_body;
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end_primitive;
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primitive 'PONT_DIODE_4A_KBL06';
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  pin
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    'V-':
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      PIN_NUMBER='(4)';
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      PINUSE='UNSPEC';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    'V+':
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      PIN_NUMBER='(3)';
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      PINUSE='UNSPEC';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    'AC1':
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      PIN_NUMBER='(2)';
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      PINUSE='UNSPEC';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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    'AC':
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      PIN_NUMBER='(1)';
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      PINUSE='UNSPEC';
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      NO_LOAD_CHECK='Both';
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      NO_IO_CHECK='Both';
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      NO_ASSERT_CHECK='TRUE';
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      NO_DIR_CHECK='TRUE';
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      ALLOW_CONNECT='TRUE';
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  end_pin;
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  body
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    PART_NAME='PONT_DIODE';
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    BODY_NAME='PONT_DIODE';
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    JEDEC_TYPE='4a_kbl06';
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    PHYS_DES_PREFIX='U';
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    CLASS='IC';
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    NC_PINS='(5)';
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  end_body;
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end_primitive;
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END.
trunk/librairies/polytech_ge/pont_diode/entity/pc.db
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 29, 2010  09:02:21
1
-- pcdb file, Rev:1.0 written by VAN 05.01-s01 on Sep 29, 2010  10:21:10
trunk/librairies/polytech_ge/pont_diode/entity/verilog.v
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// generated by newgenasym  Wed Sep 29 09:02:21 2010
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// generated by newgenasym  Wed Sep 29 10:21:10 2010
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module pont_diode (ac, ac1, \v+ , \v- );
trunk/librairies/polytech_ge/pont_diode/entity/vhdl.vhd
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-- generated by newgenasym Wed Sep 29 09:02:21 2010
1
-- generated by newgenasym Wed Sep 29 10:21:10 2010
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library ieee;
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use     ieee.std_logic_1164.all;

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