Revision 556

View differences:

branch/faye/sp4b1/SP4b1/sect308.inc
1
;*******************************************************************************
2
;
3
;     C Compiler for M16C/80
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; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
5
; and Renesas Solutions Corporation. All rights reserved.
6
;
7
;
8
;     sect30.inc     : section definition
9
;     This program is applicable when using the basic I/O library
10
;
11
;     $Date: 2005/10/12 07:54:36 $
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;     $Revision: 1.24 $
13
;
14
;******************************************************************************
15
;---------------------------------------------------------------
16
;
17
; 	Arrangement of section
18
;
19
;---------------------------------------------------------------
20
; Near RAM data area
21
;---------------------------------------------------------------
22
; SBDATA area
23
	.section	data_SE,DATA
24
	.org	400H
25
data_SE_top:
26
; for NSD
27
	.section	data_MON1_SE,DATA
28
data_MON1_SE_top:
29
	.section	data_MON2_SE,DATA
30
data_MON2_SE_top:
31
	.section	data_MON3_SE,DATA
32
data_MON3_SE_top:
33
	.section	data_MON4_SE,DATA
34
data_MON4_SE_top:
35

  
36
	.section	bss_SE,DATA,ALIGN
37
bss_SE_top:
38
; for NSD
39
	.section	bss_MON1_SE,DATA,ALIGN
40
bss_MON1_SE_top:
41
	.section	bss_MON2_SE,DATA,ALIGN
42
bss_MON2_SE_top:
43
	.section	bss_MON3_SE,DATA,ALIGN
44
bss_MON3_SE_top:
45
	.section	bss_MON4_SE,DATA,ALIGN
46
bss_MON4_SE_top:
47

  
48
	.section	data_SO,DATA
49
data_SO_top:
50
; for NSD
51
	.section	data_MON1_SO,DATA
52
data_MON1_SO_top:
53
	.section	data_MON2_SO,DATA
54
data_MON2_SO_top:
55
	.section	data_MON3_SO,DATA
56
data_MON3_SO_top:
57
	.section	data_MON4_SO,DATA
58
data_MON4_SO_top:
59

  
60
	.section	bss_SO,DATA
61
bss_SO_top:
62
; for NSD
63
	.section	bss_MON1_SO,DATA
64
bss_MON1_SO_top:
65
	.section	bss_MON2_SO,DATA
66
bss_MON2_SO_top:
67
	.section	bss_MON3_SO,DATA
68
bss_MON3_SO_top:
69
	.section	bss_MON4_SO,DATA
70
bss_MON4_SO_top:
71

  
72
; near RAM area
73
	.section	data_NE,DATA,ALIGN
74
data_NE_top:
75
; for NSD
76
	.section	data_MON1_E,DATA,ALIGN
77
data_MON1_E_top:
78
	.section	data_MON2_E,DATA,ALIGN
79
data_MON2_E_top:
80
	.section	data_MON3_E,DATA,ALIGN
81
data_MON3_E_top:
82
	.section	data_MON4_E,DATA,ALIGN
83
data_MON4_E_top:
84

  
85
	.section	bss_NE,DATA,ALIGN
86
bss_NE_top:
87
; for NSD
88
	.section	bss_MON1_E,DATA,ALIGN
89
bss_MON1_E_top:
90
	.section	bss_MON2_E,DATA,ALIGN
91
bss_MON2_E_top:
92
	.section	bss_MON3_E,DATA,ALIGN
93
bss_MON3_E_top:
94
	.section	bss_MON4_E,DATA,ALIGN
95
bss_MON4_E_top:
96

  
97
	.section	data_NO,DATA
98
data_NO_top:
99
; for NSD
100
	.section	data_MON1_O,DATA
101
data_MON1_O_top:
102
	.section	data_MON2_O,DATA
103
data_MON2_O_top:
104
	.section	data_MON3_O,DATA
105
data_MON3_O_top:
106
	.section	data_MON4_O,DATA
107
data_MON4_O_top:
108

  
109
	.section	bss_NO,DATA
110
bss_NO_top:
111
; for NSD
112
	.section	bss_MON1_O,DATA
113
bss_MON1_O_top:
114
	.section	bss_MON2_O,DATA
115
bss_MON2_O_top:
116
	.section	bss_MON3_O,DATA
117
bss_MON3_O_top:
118
	.section	bss_MON4_O,DATA
119
bss_MON4_O_top:
120

  
121
;---------------------------------------------------------------
122
; Stack area
123
;---------------------------------------------------------------
124
	.section	stack,DATA,ALIGN
125
	.blkb	STACKSIZE
126
	.align
127
stack_top:
128

  
129
	.blkb	ISTACKSIZE
130
	.align
131
istack_top:
132

  
133

  
134
;---------------------------------------------------------------
135
;	heap section
136
;---------------------------------------------------------------
137
.if __HEAP__ != 1
138
	.section	heap,DATA
139
heap_top:
140
	.blkb	HEAPSIZE
141
.endif
142

  
143
;---------------------------------------------------------------
144
; Near ROM data area
145
;---------------------------------------------------------------
146
	.section	rom_NE,ROMDATA,ALIGN
147
rom_NE_top:
148

  
149
	.section	rom_NO,ROMDATA
150
rom_NO_top:
151

  
152
;---------------------------------------------------------------
153
; Far RAM data area
154
;---------------------------------------------------------------
155
; SBDATA area for #pragma SB16DATA
156
;	.section	data_SE,DATA
157
;	.org		10000H
158
;data_SE_top:
159
; for NSD
160
;	.section	data_MON1_SE,DATA
161
;data_MON1_SE_top:
162
;	.section	data_MON2_SE,DATA
163
;data_MON2_SE_top:
164
;	.section	data_MON3_SE,DATA
165
;data_MON3_SE_top:
166
;	.section	data_MON4_SE,DATA
167
;data_MON4_SE_top:
168
;
169
;	.section	bss_SE,DATA,ALIGN
170
;bss_SE_top:
171
; for NSD
172
;	.section	bss_MON1_SE,DATA,ALIGN
173
;bss_MON1_SE_top:
174
;	.section	bss_MON2_SE,DATA,ALIGN
175
;bss_MON2_SE_top:
176
;	.section	bss_MON3_SE,DATA,ALIGN
177
;bss_MON3_SE_top:
178
;	.section	bss_MON4_SE,DATA,ALIGN
179
;bss_MON4_SE_top:
180
;
181
;	.section	data_SO,DATA
182
;data_SO_top:
183
; for NSD
184
;	.section	data_MON1_SO,DATA
185
;data_MON1_SO_top:
186
;	.section	data_MON2_SO,DATA
187
;data_MON2_SO_top:
188
;	.section	data_MON3_SO,DATA
189
;data_MON3_SO_top:
190
;	.section	data_MON4_SO,DATA
191
;data_MON4_SO_top:
192
;
193
;	.section	bss_SO,DATA
194
;bss_SO_top:
195
; for NSD
196
;	.section	bss_MON1_SO,DATA
197
;bss_MON1_SO_top:
198
;	.section	bss_MON2_SO,DATA
199
;bss_MON2_SO_top:
200
;	.section	bss_MON3_SO,DATA
201
;bss_MON3_SO_top:
202
;	.section	bss_MON4_SO,DATA
203
;bss_MON4_SO_top:
204
;
205
;	.section	data_6E,DATA,ALIGN
206
;data_6E_top:
207
; for NSD
208
;	.section	data_MON1_6E,DATA,ALIGN
209
;data_MON1_6E_top:
210
;	.section	data_MON2_6E,DATA,ALIGN
211
;data_MON2_6E_top:
212
;	.section	data_MON3_6E,DATA,ALIGN
213
;data_MON3_6E_top:
214
;	.section	data_MON4_6E,DATA,ALIGN
215
;data_MON4_6E_top:
216
;
217
;	.section	bss_6E,DATA,ALIGN
218
;bss_6E_top:
219
; for NSD
220
;	.section	bss_MON1_6E,DATA,ALIGN
221
;bss_MON1_6E_top:
222
;	.section	bss_MON2_6E,DATA,ALIGN
223
;bss_MON2_6E_top:
224
;	.section	bss_MON3_6E,DATA,ALIGN
225
;bss_MON3_6E_top:
226
;	.section	bss_MON4_6E,DATA,ALIGN
227
;bss_MON4_6E_top:
228
;
229
;	.section	data_6O,DATA
230
;data_6O_top:
231
; for NSD
232
;	.section	data_MON1_6O,DATA
233
;data_MON1_6O_top:
234
;	.section	data_MON2_6O,DATA
235
;data_MON2_6O_top:
236
;	.section	data_MON3_6O,DATA
237
;data_MON3_6O_top:
238
;	.section	data_MON4_6O,DATA
239
;data_MON4_6O_top:
240
;
241
;	.section	bss_6O,DATA
242
;bss_6O_top:
243
; for NSD
244
;	.section	bss_MON1_6O,DATA
245
;bss_MON1_6O_top:
246
;	.section	bss_MON2_6O,DATA
247
;bss_MON2_6O_top:
248
;	.section	bss_MON3_6O,DATA
249
;bss_MON3_6O_top:
250
;	.section	bss_MON4_6O,DATA
251
;bss_MON4_6O_top:
252
;
253
	.section	data_FE,DATA
254
	.org		20000H
255
data_FE_top:
256
; for NSD
257
;	.section	data_MON1_E,DATA
258
;data_MON1_E_top:
259
;	.section	data_MON2_E,DATA
260
;data_MON2_E_top:
261
;	.section	data_MON3_E,DATA
262
;data_MON3_E_top:
263
;	.section	data_MON4_E,DATA
264
;data_MON4_E_top:
265

  
266
	.section	bss_FE,DATA,ALIGN
267
bss_FE_top:
268
; for NSD
269
;	.section	bss_MON1_E,DATA,ALIGN
270
;bss_MON1_E_top:
271
;	.section	bss_MON2_E,DATA,ALIGN
272
;bss_MON2_E_top:
273
;	.section	bss_MON3_E,DATA,ALIGN
274
;bss_MON3_E_top:
275
;	.section	bss_MON4_E,DATA,ALIGN
276
;bss_MON4_E_top:
277
 
278
	.section	data_FO,DATA
279
data_FO_top:
280
; for NSD
281
;	.section	data_MON1_O,DATA
282
;data_MON1_O_top:
283
;	.section	data_MON2_O,DATA
284
;data_MON2_O_top:
285
;	.section	data_MON3_O,DATA
286
;data_MON3_O_top:
287
;	.section	data_MON4_O,DATA
288
;data_MON4_O_top:
289
 
290
	.section	bss_FO,DATA
291
bss_FO_top:
292
; for NSD
293
;	.section	bss_MON1_O,DATA
294
;bss_MON1_O_top:
295
;	.section	bss_MON2_O,DATA
296
;bss_MON2_O_top:
297
;	.section	bss_MON3_O,DATA
298
;bss_MON3_O_top:
299
;	.section	bss_MON4_O,DATA
300
;bss_MON4_O_top:
301

  
302

  
303
;---------------------------------------------------------------
304
; Far ROM data area
305
;---------------------------------------------------------------
306
	.section	rom_FE,ROMDATA
307
	.org		0FE0000H
308
rom_FE_top:
309

  
310
	.section	rom_FO,ROMDATA
311
rom_FO_top:
312

  
313
;---------------------------------------------------------------
314
; Initial data of 'data' section
315
;---------------------------------------------------------------
316
	.section	data_SEI,ROMDATA
317
data_SEI_top:
318
; for NSD
319
	.section	data_MON1_SEI,ROMDATA
320
data_MON1_SEI_top:
321
	.section	data_MON2_SEI,ROMDATA
322
data_MON2_SEI_top:
323
	.section	data_MON3_SEI,ROMDATA
324
data_MON3_SEI_top:
325
	.section	data_MON4_SEI,ROMDATA
326
data_MON4_SEI_top:
327

  
328
	.section	data_SOI,ROMDATA
329
data_SOI_top:
330
; for NSD
331
	.section	data_MON1_SOI,ROMDATA
332
data_MON1_SOI_top:
333
	.section	data_MON2_SOI,ROMDATA
334
data_MON2_SOI_top:
335
	.section	data_MON3_SOI,ROMDATA
336
data_MON3_SOI_top:
337
	.section	data_MON4_SOI,ROMDATA
338
data_MON4_SOI_top:
339

  
340
;	.section	data_6EI,ROMDATA
341
;data_6EI_top:
342
; for NSD
343
;	.section	data_MON1_6EI,ROMDATA
344
;data_MON1_6EI_top:
345
;	.section	data_MON2_6EI,ROMDATA
346
;data_MON2_6EI_top:
347
;	.section	data_MON3_6EI,ROMDATA
348
;data_MON3_6EI_top:
349
;	.section	data_MON4_6EI,ROMDATA
350
;data_MON4_6EI_top:
351
;
352
;	.section	data_6OI,ROMDATA
353
;data_6OI_top:
354
; for NSD
355
;	.section	data_MON1_6OI,ROMDATA
356
;data_MON1_6OI_top:
357
;	.section	data_MON2_6OI,ROMDATA
358
;data_MON2_6OI_top:
359
;	.section	data_MON3_6OI,ROMDATA
360
;data_MON3_6OI_top:
361
;	.section	data_MON4_6OI,ROMDATA
362
;data_MON4_6OI_top:
363

  
364
	.section	data_NEI,ROMDATA
365
data_NEI_top:
366
; for NSD
367
	.section	data_MON1_EI,ROMDATA
368
data_MON1_EI_top:
369
	.section	data_MON2_EI,ROMDATA
370
data_MON2_EI_top:
371
	.section	data_MON3_EI,ROMDATA
372
data_MON3_EI_top:
373
	.section	data_MON4_EI,ROMDATA
374
data_MON4_EI_top:
375
 
376
	.section	data_NOI,ROMDATA
377
data_NOI_top:
378
; for NSD
379
	.section	data_MON1_OI,ROMDATA
380
data_MON1_OI_top:
381
	.section	data_MON2_OI,ROMDATA
382
data_MON2_OI_top:
383
	.section	data_MON3_OI,ROMDATA
384
data_MON3_OI_top:
385
	.section	data_MON4_OI,ROMDATA
386
data_MON4_OI_top:
387
 
388
	.section	data_FEI,ROMDATA
389
data_FEI_top:
390
; for NSD
391
;	.section	data_MON1_EI,ROMDATA
392
;data_MON1_EI_top:
393
;	.section	data_MON2_EI,ROMDATA
394
;data_MON2_EI_top:
395
;	.section	data_MON3_EI,ROMDATA
396
;data_MON3_EI_top:
397
;	.section	data_MON4_EI,ROMDATA
398
;data_MON4_EI_top:
399
 
400
	.section	data_FOI,ROMDATA
401
data_FOI_top:
402
; for NSD
403
;	.section	data_MON1_OI,ROMDATA
404
;data_MON1_OI_top:
405
;	.section	data_MON2_OI,ROMDATA
406
;data_MON2_OI_top:
407
;	.section	data_MON3_OI,ROMDATA
408
;data_MON3_OI_top:
409
;	.section	data_MON4_OI,ROMDATA
410
;data_MON4_OI_top:
411

  
412
;---------------------------------------------------------------
413
; code area
414
;---------------------------------------------------------------
415
	.section	interrupt,ALIGN
416

  
417
	.section	program,ALIGN
418

  
419
	.section	program_S
420
	.org		0FF0000H
421

  
422

  
423
;---------------------------------------------------------------
424
; variable vector section
425
;---------------------------------------------------------------
426
	.section	vector,ROMDATA		; variable vector table
427
	.org	VECTOR_ADR 
428
.if	__MVT__ == 0
429
	.lword	dummy_int		; BRK (software int 0)
430
	.lword	dummy_int		; 
431
	.lword	dummy_int		; 
432
	.lword	dummy_int		; 
433
	.lword	dummy_int		; 
434
	.lword	dummy_int		; 
435
	.lword	dummy_int		; 
436
	.lword	dummy_int		; 
437
	.lword	dummy_int		; DMA0 (software int 8)
438
	.lword	dummy_int 		; DMA1 (software int 9)
439
	.lword	dummy_int 		; DMA2 (software int 10)
440
	.lword	dummy_int 		; DMA3 (software int 11)
441
	.lword	dummy_int		; TIMER A0 (software int 12)
442
	.lword	dummy_int		; TIMER A1 (software int 13)
443
	.lword	dummy_int		; TIMER A2 (software int 14)
444
	.lword	dummy_int		; TIMER A3 (software int 15)
445
	.lword	dummy_int		; TIMER A4 (software int 16)
446
	.lword	dummy_int		; uart0 trance (software int 17)
447
	.lword	dummy_int		; uart0 receive (software int 18)
448
	.lword	dummy_int		; uart1 trance (software int 19)
449
	.lword	dummy_int		; uart1 receive (software int 20)
450
	.lword	dummy_int		; TIMER B0 (software int 21)
451
	.lword	dummy_int		; TIMER B1 (software int 22)
452
	.lword	dummy_int		; TIMER B2 (software int 23)
453
	.lword	dummy_int		; TIMER B3 (software int 24)
454
	.lword	dummy_int		; TIMER B4 (software int 25)
455
	.lword	dummy_int		; INT5 (software int 26)
456
	.lword	dummy_int		; INT4 (software int 27)
457
	.lword	dummy_int		; INT3 (software int 28)
458
	.lword	dummy_int		; INT2 (software int 29)
459
	.lword	dummy_int		; INT1 (software int 30)
460
	.lword	dummy_int		; INT0 (software int 31)
461
	.lword	dummy_int		; TIMER B5 (software int 32)
462
	.lword	dummy_int		; uart2 trance/NACK (software int 33)
463
	.lword	dummy_int		; uart2 receive/ACK (software int 34)
464
	.lword	dummy_int		; uart3 trance/NACK (software int 35)
465
	.lword	dummy_int		; uart3 receive/ACK (software int 36)
466
	.lword	dummy_int		; uart4 trance/NACK (software int 37)
467
	.lword	dummy_int		; uart4 receive/ACK (software int 38)
468
	.lword	dummy_int		; uart2 bus collision (software int 39)
469
	.lword	dummy_int		; uart3 bus collision (software int 40)
470
	.lword	dummy_int		; uart4 bus collision (software int 41)
471
	.lword	dummy_int		; A-D Convert (software int 42)
472
	.lword	dummy_int		; input key (software int 43)
473
	.lword	dummy_int		; software int 44
474
	.lword	dummy_int		; software int 45
475
	.lword	dummy_int		; software int 46
476
	.lword	dummy_int		; software int 47
477
	.lword	dummy_int		; software int 48
478
	.lword	dummy_int		; software int 49
479
	.lword	dummy_int		; software int 50
480
	.lword	dummy_int		; software int 51
481
	.lword	dummy_int		; software int 52
482
	.lword	dummy_int		; software int 53
483
	.lword	dummy_int		; software int 54
484
	.lword	dummy_int		; software int 55
485
	.lword	dummy_int		; software int 56
486
	.lword	dummy_int		; software int 57
487
	.lword	dummy_int		; software int 58
488
	.lword	dummy_int		; software int 59
489
	.lword	dummy_int		; software int 60
490
	.lword	dummy_int		; software int 61
491
	.lword	dummy_int		; software int 62
492
	.lword	dummy_int		; software int 63
493
.endif	; __MVT__
494

  
495

  
496
;===============================================================
497
; fixed vector section
498
;---------------------------------------------------------------
499
	.section	svector,ROMDATA		; specialpage vector table
500
.if	__MST__ == 0	
501
	.org		SVECTOR_ADR
502
;===============================================================
503
; special page defination
504
;---------------------------------------------------------------
505
;	macro is defined in ncrt0.a30
506
;	Format: SPECIAL number
507
;
508
;---------------------------------------------------------------
509
;	SPECIAL 255
510
;	SPECIAL 254
511
;	SPECIAL 253
512
;	SPECIAL 252
513
;	SPECIAL 251
514
;	SPECIAL 250
515
;	SPECIAL 249
516
;	SPECIAL 248
517
;	SPECIAL 247
518
;	SPECIAL 246
519
;	SPECIAL 245
520
;	SPECIAL 244
521
;	SPECIAL 243
522
;	SPECIAL 242
523
;	SPECIAL 241
524
;	SPECIAL 240
525
;	SPECIAL 239
526
;	SPECIAL 238
527
;	SPECIAL 237
528
;	SPECIAL 236
529
;	SPECIAL 235
530
;	SPECIAL 234
531
;	SPECIAL 233
532
;	SPECIAL 232
533
;	SPECIAL 231
534
;	SPECIAL 230
535
;	SPECIAL 229
536
;	SPECIAL 228
537
;	SPECIAL 227
538
;	SPECIAL 226
539
;	SPECIAL 225
540
;	SPECIAL 224
541
;	SPECIAL 223
542
;	SPECIAL 222
543
;	SPECIAL 221
544
;	SPECIAL 220
545
;	SPECIAL 219
546
;	SPECIAL 218
547
;	SPECIAL 217
548
;	SPECIAL 216
549
;	SPECIAL 215
550
;	SPECIAL 214
551
;	SPECIAL 213
552
;	SPECIAL 212
553
;	SPECIAL 211
554
;	SPECIAL 210
555
;	SPECIAL 209
556
;	SPECIAL 208
557
;	SPECIAL 207
558
;	SPECIAL 206
559
;	SPECIAL 205
560
;	SPECIAL 204
561
;	SPECIAL 203
562
;	SPECIAL 202
563
;	SPECIAL 201
564
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;
748
.endif	; __MST__
749

  
750

  
751
;===============================================================
752
; fixed vector section
753
;---------------------------------------------------------------
754
	.section	fvector,ROMDATA
755
	.org	0FFFFDCh
756
UDI:
757
	.lword	dummy_int
758
OVER_FLOW:
759
	.lword	dummy_int
760
BRKI:
761
	.lword	dummy_int
762
ADDRESS_MATCH:
763
	.lword	dummy_int
764
SINGLE_STEP:
765
	.lword	dummy_int
766
WDT:
767
	.lword	dummy_int
768
DBC:
769
	.lword	dummy_int
770
NMI:
771
	.lword	dummy_int
772
RESET:
773
	.lword	start
774
;
775
;*******************************************************************************
776
;
777
;     C Compiler for M16C/80
778
; Copyright (C) 1999 (2000 - 2010) Renesas Electronics Corporation.
779
; and Renesas Solutions Corporation. All rights reserved.
780
;
781
;
782
;*******************************************************************************
783

  
branch/faye/sp4b1/SP4b1/SP4b1.hwp
1
[HIMDBVersion]
2
2.0
3
[DATABASE_VERSION]
4
"2.8" 
5
[PROJECT_DETAILS]
6
"SP4b1" "D:\tp_sp4_2021_faye\sp4b1\SP4b1" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.hwp" "M16C/80,M32C" "Renesas M32C Standard" "Application" "M32C/80" "M32C/87(M32C/87B)" 
7
[INFORMATION]
8
"No project information available" 
9
[TOOL_CHAIN]
10
"Renesas M32C Standard Toolchain" "5.42.00" 
11
[CONFIGURATIONS]
12
"Debug" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug" 
13
"Debug_M32C_E8a_SYSTEM" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug_M32C_E8a_SYSTEM" 
14
"Debug_M32C_Simulator" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug_M32C_Simulator" 
15
"Release" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\Release" 
16
[BUILD_PHASES]
17
"Renesas M32C Assembler" 1 
18
"Renesas M32C C Compiler" 1 
19
"Renesas M32C Configurator" 1 
20
"Renesas M32C Librarian" 1 
21
"Renesas M32C Linker" 1 
22
"Renesas M32C Stype Converter" 1 
23
[TOOL_ENVIRONMENT]
24
[EXTENSIONS]
25
"Absolute file" "X30" 
26
"Absolute list file" "ALS" 
27
"Assembler error tag file" "ATG" 
28
"Assembly include file" "INC" 
29
"Assembly list file" "LST" 
30
"Assembly source file" "A30" 
31
"Branch Information file" "JIN" 
32
"C header file" "H" 
33
"C source file" "C" 
34
"Configuration file" "CFG" 
35
"Cross reference file" "XRF" 
36
"Hex file" "HEX" 
37
"ID file" "ID" 
38
"Library file" "LIB" 
39
"Library list file" "LLS" 
40
"Linkage error tag file" "LTG" 
41
"Linkage map file" "MAP" 
42
"Preprocessed C source file" "I" 
43
"Relocatable file" "R30" 
44
"S-Record file" "MOT" 
45
"Systemcall file" "MRC" 
46
[FILE_GROUPS]
47
"Absolute file" "BIN" "NONE" "" 
48
"Absolute list file" "TEXT" "EDITOR" "" 
49
"Assembler error tag file" "TEXT" "EDITOR" "" 
50
"Assembly include file" "TEXT" "EDITOR" "" 
51
"Assembly list file" "TEXT" "EDITOR" "" 
52
"Assembly source file" "TEXT" "EDITOR" "" 
53
"Branch Information file" "TEXT" "EDITOR" "" 
54
"C header file" "TEXT" "EDITOR" "" 
55
"C source file" "TEXT" "EDITOR" "" 
56
"Configuration file" "TEXT" "EDITOR" "" 
57
"Cross reference file" "TEXT" "EDITOR" "" 
58
"Hex file" "TEXT" "EDITOR" "" 
59
"ID file" "TEXT" "EDITOR" "" 
60
"Library file" "BIN" "NONE" "" 
61
"Library list file" "TEXT" "EDITOR" "" 
62
"Linkage error tag file" "TEXT" "EDITOR" "" 
63
"Linkage map file" "TEXT" "EDITOR" "" 
64
"Preprocessed C source file" "TEXT" "EDITOR" "" 
65
"Relocatable file" "BIN" "NONE" "" 
66
"S-Record file" "TEXT" "EDITOR" "" 
67
"Systemcall file" "TEXT" "EDITOR" "" 
68
[ASSOCIATED_APPLICATIONS]
69
[TOOLCHAIN_PHASE]
70
"Renesas M32C Assembler" 
71
"Renesas M32C C Compiler" 
72
"Renesas M32C Configurator" 
73
"Renesas M32C Librarian" 
74
"Renesas M32C Linker" 
75
"Renesas M32C Stype Converter" 
76
[UTILITY_PHASE]
77
[CUSTOM_PHASES]
78
[CUSTOM_PHASE_INPUT_GROUP]
79
[CUSTOM_PHASE_OUTPUT_SYNTAX]
80
[BUILD_ORDER]
81
"Renesas M32C C Compiler" 1 
82
"Renesas M32C Assembler" 1 
83
"Renesas M32C Linker" 1 
84
"Renesas M32C Stype Converter" 1 
85
"Renesas M32C Librarian" 0 
86
"Renesas M32C Configurator" 0 
87
[BUILD_PHASE_DETAILS]
88
"Renesas M32C Assembler" "Assembly source file" 1 
89
"Renesas M32C C Compiler" "C source file" 1 
90
"Renesas M32C Configurator" "Configuration file" 0 
91
"Renesas M32C Librarian" "Relocatable file" 0 
92
"Renesas M32C Linker" "Relocatable file" 0 
93
"Renesas M32C Stype Converter" "Absolute file" 0 
94
[BUILD_FILE_ORDER_Assembly source file]
95
"Renesas M32C Assembler" 1 
96
[BUILD_FILE_ORDER_C source file]
97
"Renesas M32C C Compiler" 1 
98
[SCRAP]
99
"Project Generator Setup File" "" 
100
[MAPPINGS]
101
"Absolute file" "Renesas M32C Stype Converter" "Renesas M32C Linker" 
102
"Assembly source file" "Renesas M32C Assembler" "Renesas M32C C Compiler" 
103
"Relocatable file" "Renesas M32C Librarian" "Renesas M32C Assembler" 
104
"Relocatable file" "Renesas M32C Librarian" "Renesas M32C C Compiler" 
105
"Relocatable file" "Renesas M32C Linker" "Renesas M32C Assembler" 
106
"Relocatable file" "Renesas M32C Linker" "Renesas M32C C Compiler" 
107
[PROJECT_FILES]
108
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.c" "User" "C source file" 2 
109
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\ncrt0.a30" "User" "Assembly source file" 2 
110
[FOLDER]
111
"Assembly source file" "Assembly source file" 
112
"C source file" "C source file" 
113
[GENERAL_DATA_PROJECT]
114
"USE_CUSTOM_LINKAGE_ORDER" "1" 
115
[ON_DEMAND_COMPONENTS_LOADED]
116
[SYNC_SESSION_NAMES]
117
[SESSIONS]
118
"DefaultSession" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\DefaultSession.hsf" 0 
119
"SessionM32C_E8a_SYSTEM" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\SessionM32C_E8a_SYSTEM.hsf" 0 
120
"SessionM32C_Simulator" "D:\tp_sp4_2021_faye\sp4b1\SP4b1\SessionM32C_Simulator.hsf" 0 
121
[GENERAL_DATA_SESSION_DefaultSession]
122
[GENERAL_DATA_SESSION_SessionM32C_E8a_SYSTEM]
123
[GENERAL_DATA_SESSION_SessionM32C_Simulator]
124
[OPTIONS_Debug_Renesas M32C Assembler]
125
"Assembly source file" "02185a2d24257d10" 2 
126
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\ncrt0.a30" "02185a2d24257d10" 2 
127
[OPTIONS_Debug_Renesas M32C C Compiler]
128
"C source file" "02185a2d24257d10" 1 
129
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.c" "02185a2d24257d10" 1 
130
[OPTIONS_Debug_Renesas M32C Configurator]
131
"Single Shot" "02185a2d24257d10" 6 
132
[OPTIONS_Debug_Renesas M32C Librarian]
133
"Single Shot" "02185a2d24257d10" 5 
134
[OPTIONS_Debug_Renesas M32C Linker]
135
"Single Shot" "02185a2d24257d10" 3 
136
[OPTIONS_Debug_Renesas M32C Stype Converter]
137
"Single Shot" "02185a2d24257d10" 4 
138
[OPTIONS_Debug]
139
"" 0 
140
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
141
"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
142
"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
143
"[V|VERSION|1] [S|LIST|LM] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
144
"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
145
"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
146
[EXCLUDED_FILES_Debug]
147
[LINKAGE_ORDER_Debug]
148
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug\ncrt0.r30" 
149
[GENERAL_DATA_CONFIGURATION_Debug]
150
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Assembler]
151
"Assembly source file" "02185a2d24257d10" 2 
152
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\ncrt0.a30" "02185a2d24257d10" 2 
153
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C C Compiler]
154
"C source file" "02185a2d24257d10" 1 
155
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.c" "02185a2d24257d10" 1 
156
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Configurator]
157
"Single Shot" "02185a2d24257d10" 6 
158
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Librarian]
159
"Single Shot" "02185a2d24257d10" 5 
160
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Linker]
161
"Single Shot" "02185a2d24257d10" 3 
162
[OPTIONS_Debug_M32C_E8a_SYSTEM_Renesas M32C Stype Converter]
163
"Single Shot" "02185a2d24257d10" 4 
164
[OPTIONS_Debug_M32C_E8a_SYSTEM]
165
"" 0 
166
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
167
"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
168
"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
169
"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
170
"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
171
"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
172
[EXCLUDED_FILES_Debug_M32C_E8a_SYSTEM]
173
[LINKAGE_ORDER_Debug_M32C_E8a_SYSTEM]
174
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug_M32C_E8a_SYSTEM\ncrt0.r30" 
175
[GENERAL_DATA_CONFIGURATION_Debug_M32C_E8a_SYSTEM]
176
[OPTIONS_Debug_M32C_Simulator_Renesas M32C Assembler]
177
"Assembly source file" "02185a2d24257d10" 2 
178
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\ncrt0.a30" "02185a2d24257d10" 2 
179
[OPTIONS_Debug_M32C_Simulator_Renesas M32C C Compiler]
180
"C source file" "02185a2d24257d10" 1 
181
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.c" "02185a2d24257d10" 1 
182
[OPTIONS_Debug_M32C_Simulator_Renesas M32C Configurator]
183
"Single Shot" "02185a2d24257d10" 6 
184
[OPTIONS_Debug_M32C_Simulator_Renesas M32C Librarian]
185
"Single Shot" "02185a2d24257d10" 5 
186
[OPTIONS_Debug_M32C_Simulator_Renesas M32C Linker]
187
"Single Shot" "02185a2d24257d10" 3 
188
[OPTIONS_Debug_M32C_Simulator_Renesas M32C Stype Converter]
189
"Single Shot" "02185a2d24257d10" 4 
190
[OPTIONS_Debug_M32C_Simulator]
191
"" 0 
192
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
193
"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
194
"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
195
"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
196
"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
197
"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
198
[EXCLUDED_FILES_Debug_M32C_Simulator]
199
[LINKAGE_ORDER_Debug_M32C_Simulator]
200
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\Debug_M32C_Simulator\ncrt0.r30" 
201
[GENERAL_DATA_CONFIGURATION_Debug_M32C_Simulator]
202
[OPTIONS_Release_Renesas M32C Assembler]
203
"Assembly source file" "02185a2d24257d10" 2 
204
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\ncrt0.a30" "02185a2d24257d10" 2 
205
[OPTIONS_Release_Renesas M32C C Compiler]
206
"C source file" "02185a2d24257d10" 1 
207
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\SP4b1.c" "02185a2d24257d10" 1 
208
[OPTIONS_Release_Renesas M32C Configurator]
209
"Single Shot" "02185a2d24257d10" 6 
210
[OPTIONS_Release_Renesas M32C Librarian]
211
"Single Shot" "02185a2d24257d10" 5 
212
[OPTIONS_Release_Renesas M32C Linker]
213
"Single Shot" "02185a2d24257d10" 3 
214
[OPTIONS_Release_Renesas M32C Stype Converter]
215
"Single Shot" "02185a2d24257d10" 4 
216
[OPTIONS_Release]
217
"" 0 
218
"[V|VERSION|1] [B|COMMAND|1] [S|SPEC|UITRON3] " 6 
219
"[V|VERSION|1] [B|DATALENGTH|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).mot^"] " 4 
220
"[V|VERSION|1] [B|STARTUPLINK|1] [B|DEBUG|1] [B|MAP-S|1] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).x30^"] [S|INPUTLIBRARY|^"L=nc382lib^"] [S|CPU|M32C80] " 3 
221
"[V|VERSION|1] [S|LIST|L|M] [B|INSPECTOR|1] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [S|CPU|M32C80] [B|HEAP|1] [S|DEFINE|__USTACKSIZE__=0300H] [S|DEFINE|__ISTACKSIZE__=0300H]" 2 
222
"[V|VERSION|1] [S|MODE|CREATE|] [S|OUTPUT|^"$(CONFIGDIR)\$(PROJECTNAME).lib^"] " 5 
223
"[V|VERSION|1] [S|OUTPUT|OBJECTCODE] [S|OUTPUTPATH|^"$(CONFIGDIR)\$(FILELEAF).r30^"] [B|INSPECTOR|1] [S|CPU|M32C80] " 1 
224
[EXCLUDED_FILES_Release]
225
[LINKAGE_ORDER_Release]
226
"D:\tp_sp4_2021_faye\sp4b1\SP4b1\Release\ncrt0.r30" 
227
[GENERAL_DATA_CONFIGURATION_Release]
228
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
229
[SESSION_DATA_CONFIGURATION_SESSION_Debug_DefaultSession]
230
"MEMORY_MAPPING_OPTIONS" "" 
231
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]
232
[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_E8a_SYSTEM]
233
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
234
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_Simulator]
235
[SESSION_DATA_CONFIGURATION_SESSION_Debug_SessionM32C_Simulator]
236
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
237
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_DefaultSession]
238
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_DefaultSession]
239
"MEMORY_MAPPING_OPTIONS" "" 
240
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_E8a_SYSTEM]
241
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_E8a_SYSTEM]
242
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
243
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]
244
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_E8a_SYSTEM_SessionM32C_Simulator]
245
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
246
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]
247
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_DefaultSession]
248
"MEMORY_MAPPING_OPTIONS" "" 
249
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]
250
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_E8a_SYSTEM]
251
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
252
[GENERAL_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]
253
[SESSION_DATA_CONFIGURATION_SESSION_Debug_M32C_Simulator_SessionM32C_Simulator]
254
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
255
[GENERAL_DATA_CONFIGURATION_SESSION_Release_DefaultSession]
256
[SESSION_DATA_CONFIGURATION_SESSION_Release_DefaultSession]
257
"MEMORY_MAPPING_OPTIONS" "" 
258
[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]
259
[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_E8a_SYSTEM]
260
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
261
[GENERAL_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]
262
[SESSION_DATA_CONFIGURATION_SESSION_Release_SessionM32C_Simulator]
263
"MEMORY_MAPPING_OPTIONS" "Unknown Options" 
264
[EXT_DEBUGGER_INFO]
265
0 "" "" "" "" 
266
[END]
branch/faye/sp4b1/SP4b1/DefaultSession.hsf
1
[HIMDBVersion]
2
2.0
3
[DATABASE_VERSION]
4
"2.3" 
5
[SESSION_DETAILS]
6
"" 
7
[INFORMATION]
8
"" 
9
[GENERAL_DATA]
10
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlECX_MAP_FIND_SYMBOL_LIST" "" 
11
"{287A8023-99B5-49E1-A54E-4DDCA43D7959}MapCtrlViews" "0" 
12
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBatchFileName" "" 
13
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointFlag" "-1 " 
14
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBreakpointStatus" "-1 " 
15
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlBrowseDirectory" "" 
16
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlLogFileName" "" 
17
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlSplitterPosition" "242" 
18
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}CmdLineCtrlViews" "0" 
19
"{313F4FC1-6566-11D5-8BBE-0004E2013C71}TclTkCtrlLogFileName" "" 
20
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileDir" "" 
21
"{6C4D5B81-FD67-46A9-A089-EA44DCDE47FD}RAMMonitorManagerCtrlBlockInfoFileName" "" 
22
"{7943C44E-7D44-422A-9140-4CF55C88F7D3}DifferenceCtrlViews" "0" 
23
[LANGUAGE]
24
"English" 
25
[CONFIG_INFO_VD1]
26
1 
27
[CONFIG_INFO_VD2]
28
0 
29
[CONFIG_INFO_VD3]
30
0 
31
[CONFIG_INFO_VD4]
32
0 
33
[WINDOW_POSITION_STATE_DATA_VD1]
34
"Help" "TOOLBAR 0" 59419 1 5 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
35
"{WK_00000001_OUTPUT}" "WINDOW" 59422 0 0 "1.00" 180 534 287 350 200 18 0 "36756|36757|36758|36759|<<separator>>|36746|36747|<<separator>>|39531|<<separator>>|39500|39534|<<separator>>|36687" "0.0" 
36
"{WK_00000002_WORKSPACE}" "WINDOW" 59420 0 0 "1.00" 180 534 287 350 200 18 0 "" "0.0" 
37
"{WK_TB00000001_STANDARD}" "TOOLBAR 0" 59419 0 2 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
38
"{WK_TB00000002_EDITOR}" "TOOLBAR 0" 59419 0 0 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
39
"{WK_TB00000003_BOOKMARKS}" "TOOLBAR 0" 59419 1 1 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
40
"{WK_TB00000004_TEMPLATES}" "TOOLBAR 0" 59419 1 0 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
41
"{WK_TB00000005_SEARCH}" "TOOLBAR 0" 59419 0 1 "0.00" 0 0 0 0 0 18 0 "" "0.0" 
42
"{WK_TB00000007_DEBUG}" "TOOLBAR 0" 59419 2 0 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
43
"{WK_TB00000008_DEBUGRUN}" "TOOLBAR 0" 59419 2 1 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
44
"{WK_TB00000009_VERSIONCONTROL}" "TOOLBAR 0" 59419 1 3 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
45
"{WK_TB00000012_MAP}" "TOOLBAR 0" 59419 1 4 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
46
"{WK_TB00000018_DEFAULTWINDOW}" "TOOLBAR 0" 59419 1 2 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
47
"{WK_TB00000026_MACRO}" "TOOLBAR 0" 59419 1 6 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
48
"{WK_TB00000028_RTOSDEBUG}" "TOOLBAR 0" 59419 2 2 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
49
"{WK_TB00000029_SYSTEMTOOL}" "TOOLBAR 0" 59419 2 3 "0.00" 0 0 0 0 0 17 0 "" "0.0" 
50
[WINDOW_POSITION_STATE_DATA_VD2]
51
[WINDOW_POSITION_STATE_DATA_VD3]
52
[WINDOW_POSITION_STATE_DATA_VD4]
53
[WINDOW_Z_ORDER]
54
[TARGET_NAME]
55
"" "" 1869837157 
56
[STATUSBAR_STATEINFO_VD1]
57
"MasterShowState" 1 
58
"ApplicationShowState" 1 
59
"DebuggerShowState" 1 
60
[STATUSBAR_STATEINFO_VD2]
61
"MasterShowState" 1 
62
"ApplicationShowState" 1 
63
"DebuggerShowState" 1 
64
[STATUSBAR_STATEINFO_VD3]
65
"MasterShowState" 1 
66
"ApplicationShowState" 1 
67
"DebuggerShowState" 1 
68
[STATUSBAR_STATEINFO_VD4]
69
"MasterShowState" 1 
70
"ApplicationShowState" 1 
71
"DebuggerShowState" 1 
72
[STATUSBAR_DEBUGGER_PANESTATE_VD1]
73
[STATUSBAR_DEBUGGER_PANESTATE_VD2]
74
[STATUSBAR_DEBUGGER_PANESTATE_VD3]
75
[STATUSBAR_DEBUGGER_PANESTATE_VD4]
76
[DEBUGGER_OPTIONS]
77
"" 
78
[DOWNLOAD_MODULES]
79
[CONNECT_ON_GO]
80
"FALSE" 
81
[DOWNLOAD_MODULES_AFTER_BUILD]
82
"TRUE" 
83
[REMOVE_BREAKPOINTS_ON_DOWNLOAD]
84
"FALSE" 
85
[DISABLE_MEMORY_ACCESS_PRIOR_TO_COMMAND_FILE_EXECUTION]
86
"FALSE" 
87
[LIMIT_DISASSEMBLY_MEMORY_ACCESS]
88
"FALSE" 
89
[DISABLE_MEMORY_ACCESS_DURING_EXECUTION]
90
"FALSE" 
91
[DEBUGGER_OPTIONS_PROPERTIES]
92
"1" 
93
[COMMAND_FILES]
94
[DEFAULT_DEBUG_FORMAT]
95
"" 
96
[FLASH_DETAILS]
97
"" 0 0 "" 0 "" 0 0 "" 0 0 0 0 0 0 0 "" "" "" "" "" 
98
[BREAKPOINTS]
99
[END]
branch/faye/sp4b1/SP4b1/SessionM32C_E8a_SYSTEM.ini
1
[EMULATOR_SETTING]
2
HIDE_DIALOG=0
3
[RESET_RELEASE]
4
ENABLE=0
5
[CPU_SELECT]
6
DEVICE=M30879FL
7
EMUSEL=0
8
MCU_GROUP=M32C__87 Group
9
[POWER_SUPPLY]
10
VOLTAGE_5_0=0
11
VOLTAGE_3_3=0
12
[FW_LOCATE]
13
FWADDRESS=fff0
14
RAMADDRESS=04
15
[WDT]
16
WDT_USE=0
17
[MCU_SETTING]
18
PROCESSOR_MODE=0
19
[COMMUNI]
20
COMSPEED=8
21
[Driver Configuration]
22
Renesas Communications=USB interface,0,
23
[Target]
24
M32C E8a SYSTEM=Renesas Communications
branch/faye/sp4b1/SP4b1/sfr32c87.h
1
/************************************************************************************
2
*                                                                                   *
3
*   File name : sfr32c87.h                                                          *
4
*   Contents  : Definition of M32C/87 Group SFR                                     *
5
*                                                                                   *
6
*   Copyright, 2003 RENESAS TECHNOLOGY CORPORATION                                  *
7
*                   AND RENESAS SOLUTIONS CORPORATION                               *
8
*                                                                                   *
9
*   Note      :                                                                     *
10
*                                                                                   *
11
*   Version   : Ver 0.01 (04-09-23) Preliminary                                     *
12
*                       These data made based on M32C/85 Group H/W Manual Rev.0.30  *
13
*   Version   : Ver 0.02 (04-12-02) Preliminary                                     *
14
*   Version   : Ver 0.03 (04-12-22) Preliminary                                     *
15
*   Version   : Ver 0.04 (05-12-08) Preliminary                                     *
16
*   Version   : Ver 0.05 (06-01-23) Preliminary                                     *
17
*                                                                                   *
18
*************************************************************************************/
19
/*
20
  note:
21
    This data is a freeware that SFR for M32C/87 group are described.
22
    RENESAS TECHNOLOGY CORPORATION and RENESAS SOLUTIONS CORPORATION assume
23
    no responsibility for any damage that occurred by this data.
24
*/
25

  
26
/************************************************************************
27
*   declare SFR address                                                 *
28
************************************************************************/
29
#pragma ADDRESS     pm0_addr    0004H       /* Processor mode register 0 */
30
#pragma ADDRESS     pm1_addr    0005H       /* Processor mode register 1 */
31
#pragma ADDRESS     cm0_addr    0006H       /* System clock control register 0 */
32
#pragma ADDRESS     cm1_addr    0007H       /* System clock control register 1 */
33

  
34
#pragma ADDRESS     aier_addr   0009H       /* Address match interrupt enable register */
35
#pragma ADDRESS     prcr_addr   000aH       /* Protect register */
36
#pragma ADDRESS     ds_addr     000bH       /* External data bus width control register */
37
#pragma ADDRESS     mcd_addr    000cH       /* Main clock division register */
38
#pragma ADDRESS     cm2_addr    000dH       /* Oscillation stop detect register */
39
#pragma ADDRESS     wdts_addr   000eH       /* Watchdog timer start register */
40
#pragma ADDRESS     wdc_addr    000fH       /* Watchdog timer control register */
41
#pragma ADDRESS     rmad0_addr  0010H       /* Address match interrupt register 0 */
42
#pragma ADDRESS     pm2_addr    0013H       /* Processor mode register 2 */
43
#pragma ADDRESS     rmad1_addr  0014H       /* Address match interrupt register 1 */
44
#pragma ADDRESS     vcr2_addr   0017H       /* Voltage detection register 2 */
45
#pragma ADDRESS     rmad2_addr  0018H       /* Address match interrupt register 2 */
46
#pragma ADDRESS     vcr1_addr   001bH       /* Voltage detection register 1 */
47
#pragma ADDRESS     rmad3_addr  001cH       /* Address match interrupt register 3 */
48

  
49

  
50
#pragma ADDRESS     plc_addr    0026H       /* PLL control register */
51
#pragma ADDRESS     plc0_addr   0026H       /* PLL control register 0 */
52
#pragma ADDRESS     plc1_addr   0027H       /* PLL control register 1 */
53
#pragma ADDRESS     rmad4_addr  0028H       /* Address match interrupt register 4 */
54

  
55
#pragma ADDRESS     rmad5_addr  002CH       /* Address match interrupt register 5 */
56
#pragma ADDRESS     d4int_addr  002FH       /* Voltage down detect interrupt register */
57

  
58

  
59
#pragma ADDRESS     rmad6_addr  0038H       /* Address match interrupt register 6 */
60
#pragma ADDRESS     rmad7_addr  003CH       /* Address match interrupt register 7 */
61

  
62

  
63
#pragma ADDRESS     ewcr0_addr  0048H       /* External space wait control register 0 */
64
#pragma ADDRESS     ewcr1_addr  0049H       /* External space wait control register 1 */
65
#pragma ADDRESS     ewcr2_addr  004AH       /* External space wait control register 2 */
66
#pragma ADDRESS     ewcr3_addr  004BH       /* External space wait control register 3 */
67

  
68

  
69
#pragma ADDRESS     fmr1_addr   0055H       /* Flash Memory Control Register 1 */
70

  
71
#pragma ADDRESS     fmr_addr    0057H       /* Flash memory control register 0 */
72
#pragma ADDRESS     fmr0_addr   0057H       /* Flash memory control register 0 */
73

  
74

  
75
#pragma ADDRESS     dm0ic_addr  0068H       /* DMA0 interrupt control register */
76
#pragma ADDRESS     tb5ic_addr  0069H       /* Timer B5 interrupt register */
77
#pragma ADDRESS     dm2ic_addr  006aH       /* DMA2 interrupt register */
78
#pragma ADDRESS     s2ric_addr  006bH       /* UART2 receive/ack interrupt control register */
79
#pragma ADDRESS     ta0ic_addr  006cH       /* Timer A0 interrupt control register */
80
#pragma ADDRESS     s3ric_addr  006dH       /* UART3 receive/ack interrupt control register */
81
#pragma ADDRESS     ta2ic_addr  006eH       /* Timer A2 interrupt control register */
82
#pragma ADDRESS     s4ric_addr  006fH       /* UART4 receive/ack interrupt control register */
83
#pragma ADDRESS     ta4ic_addr  0070H       /* Timer A4 interrupt control register */
84
#pragma ADDRESS     bcn0ic_addr 0071H       /* Bus collision (UART0) interrupt control register */
85
#pragma ADDRESS     bcn3ic_addr 0071H       /* Bus collision (UART3) interrupt control register */
86
#pragma ADDRESS     s0ric_addr  0072H       /* UART0 receive interrupt control register */
87
#pragma ADDRESS     ad0ic_addr  0073H       /* A/D0 conversion interrupt control register */
88
#pragma ADDRESS     s1ric_addr  0074H       /* UART1 receive interrupt control register */
89
#pragma ADDRESS     iio0ic_addr 0075H       /* Intelligent I/O interrupt control register 0 */
90
#pragma ADDRESS     can3ic_addr 0075H       /* CAN interrupt 3 control register */
91
#pragma ADDRESS     tb1ic_addr  0076H       /* Timer B1 interrupt control register */
92
#pragma ADDRESS     iio2ic_addr 0077H       /* Intelligent I/O interrupt control register 2 */
93
#pragma ADDRESS     tb3ic_addr  0078H       /* Timer B3 interrupt control register */
94
#pragma ADDRESS     iio4ic_addr 0079H       /* Intelligent I/O interrupt control register 4 */
95
#pragma ADDRESS     int5ic_addr 007aH       /* INT5~ interrupt control register */
96
#pragma ADDRESS     iio6ic_addr 007bH       /* Intelligent I/O interrupt control register 6 */
97
#pragma ADDRESS     int3ic_addr 007cH       /* INT3~ interrupt control register */
98
#pragma ADDRESS     iio8ic_addr 007dH       /* Intelligent I/O interrupt control register 8 */
99
#pragma ADDRESS     int1ic_addr 007eH       /* INT1~ interrupt control register */
100
#pragma ADDRESS     iio10ic_addr 007fH      /* Intelligent I/O interrupt control register 10 */
101
#pragma ADDRESS     can1ic_addr 007fH       /* CAN Interrupt 1 Control Register */
102

  
103
#pragma ADDRESS     iio11ic_addr 0081H      /* Intelligent I/O interrupt control register 11 */
104
#pragma ADDRESS     can2ic_addr 0081H       /* CAN Interrupt 2 Control Register */
105

  
106

  
107
#pragma ADDRESS     dm1ic_addr  0088H       /* DMA1 interrupt control register */
108
#pragma ADDRESS     s2tic_addr  0089H       /* UART2 transmit/nack interrupt control register */
109
#pragma ADDRESS     dm3ic_addr  008aH       /* DMA3 interrupt control register */
110
#pragma ADDRESS     s3tic_addr  008bH       /* UART3 transmit/nack interrupt control register */
111
#pragma ADDRESS     ta1ic_addr  008cH       /* Timer A1 interrupt control register */
112
#pragma ADDRESS     s4tic_addr  008dH       /* UART4 transmit/nack interrupt control register */
113
#pragma ADDRESS     ta3ic_addr  008eH       /* Timer A3 interrupt control register */
114
#pragma ADDRESS     bcn2ic_addr 008fH       /* Bus collision (UART2) interrupt control register */
115
#pragma ADDRESS     s0tic_addr  0090H       /* UART0 transmit interrupt control register */
116
#pragma ADDRESS     bcn1ic_addr 0091H       /* Bus collision (UART1) interrupt control register*/
117
#pragma ADDRESS     bcn4ic_addr 0091H       /* Bus collision (UART4) interrupt control register */
118
#pragma ADDRESS     s1tic_addr  0092H       /* UART1 transmit interrupt control register */
119
#pragma ADDRESS     kupic_addr  0093H       /* Key input interrupt control register */
120
#pragma ADDRESS     tb0ic_addr  0094H       /* Timer B0 interrupt control register */
121
#pragma ADDRESS     iio1ic_addr 0095H       /* Intelligent I/O interrupt control register 1 */
122
#pragma ADDRESS     can4ic_addr 0095H       /* CAN Interrupt 4 Control Register */
123
#pragma ADDRESS     tb2ic_addr  0096H       /* Timer B2 interrupt control register */
124
#pragma ADDRESS     iio3ic_addr 0097H       /* Intelligent I/O interrupt control register 3 */
125
#pragma ADDRESS     tb4ic_addr  0098H       /* Timer B4 interrupt control register */
126
#pragma ADDRESS     iio5ic_addr 0099H       /* Intelligent I/O interrupt control register 5 */
127
#pragma ADDRESS     can5ic_addr 0099H       /* CAN Interrupt 5 Control Register */
128
#pragma ADDRESS     int4ic_addr 009aH       /* INT4~ interrupt control register */
129
#pragma ADDRESS     iio7ic_addr 009bH       /* Intelligent I/O interrupt control register 7 */
130
#pragma ADDRESS     int2ic_addr 009cH       /* INT2~ interrupt control register */
131
#pragma ADDRESS     iio9ic_addr 009dH       /* Intelligent I/O interrupt control register 9 */
132
#pragma ADDRESS     can0ic_addr 009dH       /* CAN0 Interrupt Control Register*/
133
#pragma ADDRESS     int0ic_addr 009eH       /* INT0~ interrupt control register */
134
#pragma ADDRESS     rlvl_addr   009fH       /* Exit priority register */
135
#pragma ADDRESS     iio0ir_addr 00a0H       /* Interrupt request register 0 */
136
#pragma ADDRESS     iio1ir_addr 00a1H       /* Interrupt request register 1 */
137
#pragma ADDRESS     iio2ir_addr 00a2H       /* Interrupt request register 2 */
138
#pragma ADDRESS     iio3ir_addr 00a3H       /* Interrupt request register 3 */
139
#pragma ADDRESS     iio4ir_addr 00a4H       /* Interrupt request register 4 */
140
#pragma ADDRESS     iio5ir_addr 00a5H       /* Interrupt request register 5 */
141
#pragma ADDRESS     iio6ir_addr 00a6H       /* Interrupt request register 6 */
142
#pragma ADDRESS     iio7ir_addr 00a7H       /* Interrupt request register 7 */
143
#pragma ADDRESS     iio8ir_addr 00a8H       /* Interrupt request register 8 */
144
#pragma ADDRESS     iio9ir_addr 00a9H       /* Interrupt request register 9 */
145
#pragma ADDRESS     iio10ir_addr 00aaH      /* Interrupt request register 10 */
146
#pragma ADDRESS     iio11ir_addr 00abH      /* Interrupt request register 11 */
147

  
148

  
149
#pragma ADDRESS     iio0ie_addr 00b0H       /* Interrupt enable register 0 */
150
#pragma ADDRESS     iio1ie_addr 00b1H       /* Interrupt enable register 1 */
151
#pragma ADDRESS     iio2ie_addr 00b2H       /* Interrupt enable register 2 */
152
#pragma ADDRESS     iio3ie_addr 00b3H       /* Interrupt enable register 3 */
153
#pragma ADDRESS     iio4ie_addr 00b4H       /* Interrupt enable register 4 */
154
#pragma ADDRESS     iio5ie_addr 00b5H       /* Interrupt enable register 5 */
155
#pragma ADDRESS     iio6ie_addr 00b6H       /* Interrupt enable register 6 */
156
#pragma ADDRESS     iio7ie_addr 00b7H       /* Interrupt enable register 7 */
157
#pragma ADDRESS     iio8ie_addr 00b8H       /* Interrupt enable register 8 */
158
#pragma ADDRESS     iio9ie_addr 00b9H       /* Interrupt enable register 9 */
159
#pragma ADDRESS     iio10ie_addr 00baH      /* Interrupt enable register 10 */
160
#pragma ADDRESS     iio11ie_addr 00bbH      /* Interrupt enable register 11 */
161

  
162

  
163
#pragma ADDRESS     g0rb_addr   00e8H       /* SI/O receive buffer register 0 */
164
#pragma ADDRESS     g0tb_addr   00eaH       /* Transmit buffer register 0 */
165
#pragma ADDRESS     g0dr_addr   00eaH       /* Receive data register 0 */
166

  
167
#pragma ADDRESS     g0ri_addr   00ecH       /* Receive input register 0 */
168
#pragma ADDRESS     g0mr_addr   00edH       /* SI/O communication control register 0 */
169
#pragma ADDRESS     g0to_addr   00eeH       /* Transmit output register 0 */
170
#pragma ADDRESS     g0cr_addr   00efH       /* SI/O communication control register 0 */
171
#pragma ADDRESS     g0cmp0_addr 00f0H       /* Data compare register 00 */
172
#pragma ADDRESS     g0cmp1_addr 00f1H       /* Data compare register 01 */
173
#pragma ADDRESS     g0cmp2_addr 00f2H       /* Data compare register 02 */
174
#pragma ADDRESS     g0cmp3_addr 00f3H       /* Data compare register 03 */
175
#pragma ADDRESS     g0msk0_addr 00f4H       /* Data mask register 00 */
176
#pragma ADDRESS     g0msk1_addr 00f5H       /* Data mask register 01 */
177
#pragma ADDRESS     ccs_addr    00f6H       /* Communication clock select register */
178

  
179
#pragma ADDRESS     g0rcrc_addr 00f8H       /* Receive CRC code register 0 */
180
#pragma ADDRESS     g0tcrc_addr 00faH       /* Transmit CRC code register 0 */
181
#pragma ADDRESS     g0emr_addr  00fcH       /* SI/O expansion mode register 0 */
182
#pragma ADDRESS     g0erc_addr  00fdH       /* SI/O expansion receive control register 0 */
183
#pragma ADDRESS     g0irf_addr  00feH       /* SI/O special communication interrupt detect register 0 */
184
#pragma ADDRESS     g0etc_addr  00ffH       /* SI/O expansion transmit control register 0 */
185
#pragma ADDRESS     g1tm0_addr  0100H       /* Time measurement register 10 */
186
#pragma ADDRESS     g1po0_addr  0100H       /* Waveform generate register 10 */
187
#pragma ADDRESS     g1tm1_addr  0102H       /* Time measurement register 11 */
188
#pragma ADDRESS     g1po1_addr  0102H       /* Waveform generate register 11 */
189
#pragma ADDRESS     g1tm2_addr  0104H       /* Time measurement register 12 */
190
#pragma ADDRESS     g1po2_addr  0104H       /* Waveform generate register 12 */
191
#pragma ADDRESS     g1tm3_addr  0106H       /* Time measurement register 13 */
192
#pragma ADDRESS     g1po3_addr  0106H       /* Waveform generate register 13 */
193
#pragma ADDRESS     g1tm4_addr  0108H       /* Time measurement register 14 */
194
#pragma ADDRESS     g1po4_addr  0108H       /* Waveform generate register 14 */
195
#pragma ADDRESS     g1tm5_addr  010aH       /* Time measurement register 15 */
196
#pragma ADDRESS     g1po5_addr  010aH       /* Waveform generate register 15 */
197
#pragma ADDRESS     g1tm6_addr  010cH       /* Time measurement register 16 */
198
#pragma ADDRESS     g1po6_addr  010cH       /* Waveform generate register 16 */
199
#pragma ADDRESS     g1tm7_addr  010eH       /* Time measurement register 17 */
200
#pragma ADDRESS     g1po7_addr  010eH       /* Waveform generate register 17 */
201
#pragma ADDRESS     g1pocr0_addr 0110H      /* Waveform generate control register 10 */
202
#pragma ADDRESS     g1pocr1_addr 0111H      /* Waveform generate control register 11 */
203
#pragma ADDRESS     g1pocr2_addr 0112H      /* Waveform generate control register 12 */
204
#pragma ADDRESS     g1pocr3_addr 0113H      /* Waveform generate control register 13 */
205
#pragma ADDRESS     g1pocr4_addr 0114H      /* Waveform generate control register 14 */
206
#pragma ADDRESS     g1pocr5_addr 0115H      /* Waveform generate control register 15 */
207
#pragma ADDRESS     g1pocr6_addr 0116H      /* Waveform generate control register 16 */
208
#pragma ADDRESS     g1pocr7_addr 0117H      /* Waveform generate control register 17 */
209
#pragma ADDRESS     g1tmcr0_addr 0118H      /* Time measurement control register 10 */
210
#pragma ADDRESS     g1tmcr1_addr 0119H      /* Time measurement control register 11 */
211
#pragma ADDRESS     g1tmcr2_addr 011aH      /* Time measurement control register 12 */
212
#pragma ADDRESS     g1tmcr3_addr 011bH      /* Time measurement control register 13 */
213
#pragma ADDRESS     g1tmcr4_addr 011cH      /* Time measurement control register 14 */
214
#pragma ADDRESS     g1tmcr5_addr 011dH      /* Time measurement control register 15 */
215
#pragma ADDRESS     g1tmcr6_addr 011eH      /* Time measurement control register 16 */
216
#pragma ADDRESS     g1tmcr7_addr 011fH      /* Time measurement control register 17 */
217
#pragma ADDRESS     g1bt_addr    0120H      /* Base timer register 1 */
218
#pragma ADDRESS     g1bcr0_addr  0122H      /* Base timer control register 10 */
219
#pragma ADDRESS     g1bcr1_addr  0123H      /* Base timer control register 11 */
220
#pragma ADDRESS     g1tpr6_addr  0124H      /* Time measurement prescaler register 16 */
221
#pragma ADDRESS     g1tpr7_addr  0125H      /* Time measurement prescaler register 17 */
222
#pragma ADDRESS     g1fe_addr    0126H      /* Function enable register 1 */
223
#pragma ADDRESS     g1fs_addr    0127H      /* Function select register 1 */
224
#pragma ADDRESS     g1rb_addr    0128H      /* SI/O receive buffer register 1 */
225
#pragma ADDRESS     g1tb_addr    012aH      /* Transmit buffer register 1 */
226
#pragma ADDRESS     g1dr_addr    012aH      /* Receive data register 1 */
227

  
228
#pragma ADDRESS     g1ri_addr    012cH      /* Receive input register 1 */
229
#pragma ADDRESS     g1mr_addr    012dH      /* SI/O communication mode register 1 */
230
#pragma ADDRESS     g1to_addr    012eH      /* Transmit output register 1 */
231
#pragma ADDRESS     g1cr_addr    012fH      /* SI/O communication control register 1 */
232
#pragma ADDRESS     g1cmp0_addr  0130H      /* Data compare register 10 */
233
#pragma ADDRESS     g1cmp1_addr  0131H      /* Data compare register 11 */
234
#pragma ADDRESS     g1cmp2_addr  0132H      /* Data compare register 12 */
235
#pragma ADDRESS     g1cmp3_addr  0133H      /* Data compare register 13 */
236
#pragma ADDRESS     g1msk0_addr  0134H      /* Data mask register 10 */
237
#pragma ADDRESS     g1msk1_addr  0135H      /* Data mask register 11 */
238

  
239

  
240
#pragma ADDRESS     g1rcrc_addr  0138H      /* Receive CRC code register 1 */
241
#pragma ADDRESS     g1tcrc_addr  013aH      /* Transmit CRC code register 1 */
242
#pragma ADDRESS     g1emr_addr   013cH      /* SI/O extended mode register 1 */
243
#pragma ADDRESS     g1erc_addr   013dH      /* SI/O extended receive control register 1 */
244
#pragma ADDRESS     g1irf_addr   013eH      /* SI/O special communication interrupt detect register 1 */
245
#pragma ADDRESS     g1etc_addr   013fH      /* SI/O extended transmit control register 1 */
246

  
247
#pragma ADDRESS     g2po0_addr   0140H
248
#pragma ADDRESS     g2po1_addr   0142H
249
#pragma ADDRESS     g2po2_addr   0144H
250
#pragma ADDRESS     g2po3_addr   0146H
251
#pragma ADDRESS     g2po4_addr   0148H
252
#pragma ADDRESS     g2po5_addr   014aH
253
#pragma ADDRESS     g2po6_addr   014cH
254
#pragma ADDRESS     g2po7_addr   014eH
255
#pragma ADDRESS     g2pocr0_addr 0150H
256
#pragma ADDRESS     g2pocr1_addr 0151H
257
#pragma ADDRESS     g2pocr2_addr 0152H
258
#pragma ADDRESS     g2pocr3_addr 0153H
259
#pragma ADDRESS     g2pocr4_addr 0154H
260
#pragma ADDRESS     g2pocr5_addr 0155H
261
#pragma ADDRESS     g2pocr6_addr 0156H
262
#pragma ADDRESS     g2pocr7_addr 0157H
263

  
264

  
265
#pragma ADDRESS     g2bt_addr    0160H
266
#pragma ADDRESS     g2bcr0_addr  0162H
267
#pragma ADDRESS     g2bcr1_addr  0163H
268
#pragma ADDRESS     btsr_addr    0164H
269

  
270
#pragma ADDRESS     g2fe_addr    0166H
271
#pragma ADDRESS     g2rtp_addr   0167H
272

  
273

  
274
#pragma ADDRESS     g2mr_addr    016aH
275
#pragma ADDRESS     g2cr_addr    016bH
276
#pragma ADDRESS     g2tb_addr    016cH
277
#pragma ADDRESS     g2rb_addr    016eH
278
#pragma ADDRESS     iear_addr    0170H
279
#pragma ADDRESS     iecr_addr    0172H
280
#pragma ADDRESS     ietif_addr   0173H
281
#pragma ADDRESS     ierif_addr   0174H
282

  
283

  
284
#pragma ADDRESS     ipsb_addr    0177H      /* Input function select register B */
285
#pragma ADDRESS     ips_addr     0178H      /* Input function select register */
286
#pragma ADDRESS     ipsa_addr    0179H      /* Input function select register A */
287

  
288

  
289
#pragma ADDRESS     u5mr_addr   01c0H       /* UART5 transmit/receive mode register */
290
#pragma ADDRESS     u5brg_addr  01c1H       /* UART5 bit rate generator */
291
#pragma ADDRESS     u5tb_addr   01c2H       /* UART5 transmit buffer register */
292
#pragma ADDRESS     u5c0_addr   01c4H       /* UART5 transmit/receive control register 0 */
293
#pragma ADDRESS     u5c1_addr   01c5H       /* UART5 transmit/receive control register 1 */
294
#pragma ADDRESS     u5rb_addr   01c6H       /* UART5 receive buffer register */
295
#pragma ADDRESS     u6mr_addr   01c8H       /* UART6 transmit/receive mode register */
296
#pragma ADDRESS     u6brg_addr  01c9H       /* UART6 bit rate generator */
297
#pragma ADDRESS     u6tb_addr   01caH       /* UART6 transmit buffer register */
298
#pragma ADDRESS     u6c0_addr   01ccH       /* UART6 transmit/receive control register 0 */
299
#pragma ADDRESS     u6c1_addr   01cdH       /* UART6 transmit/receive control register 1 */
300
#pragma ADDRESS     u6rb_addr   01ceH       /* UART6 receive buffer register */
301
#pragma ADDRESS     u56con_addr 01d0H
302
#pragma ADDRESS     u56is_addr  01d1H
303

  
304

  
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