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1 2 jalaffon
// Header for DMA0 control
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// declaration registre interne CPU
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unsigned short dmd0;
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#pragma DMAC dmd0 DMD0      // DMA mode register channel 0 and 1
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unsigned short dct0;
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#pragma DMAC dct0 DCT0      // DMA transfert count regsiter channel 0
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unsigned short drc0;
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#pragma DMAC drc0 DRC0      // DMA transfert count reload register channel 0
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void _far *dma0;
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#pragma DMAC dma0 DMA0      // DMA memory address register channel 0
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void _far *dsa0;
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#pragma DMAC dsa0 DSA0      // DMA sfr address register channel 0
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void _far *dra0;
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#pragma DMAC dra0 DRA0      // DMA memory address reload register channel 0
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unsigned short dct1;
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#pragma DMAC dct1 DCT1      // DMA transfert count regsiter channel 1
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unsigned short drc1;
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#pragma DMAC drc1 DRC1      // DMA transfert count reload register channel 1
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void _far *dma1;
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#pragma DMAC dma1 DMA1      // DMA memory address register channel 1
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void _far *dsa1;
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#pragma DMAC dsa1 DSA1      // DMA sfr address register channel 1
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void _far *dra1;
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#pragma DMAC dra1 DRA1      // DMA memory address reload register channel 1
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// declaration prototype fonctions
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void dma0_init(void);
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void uart0_str_dma0 (char str[]);
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void uart0_dma0_itx();